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author | Madalin Bucur <madalin.bucur@nxp.com> | 2017-05-16 15:07:21 +0300 |
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committer | Shawn Guo <shawnguo@kernel.org> | 2017-05-21 05:13:37 +0300 |
commit | 1ffbecdd8321a8eb38503b63a9018995b872ed95 (patch) | |
tree | df73ff6e19b8459adecbc659086a8b1f9eaaaee7 /arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi | |
parent | c13a2da8701f4adb0eaf9c8ab94c2116a39bb3b2 (diff) | |
download | linux-1ffbecdd8321a8eb38503b63a9018995b872ed95.tar.xz |
arm64: dts: add DPAA FMan nodes
Add the DPAA 1.x FMan nodes for the ARM based platforms.
Using separate files for each port as not all ports are used on all
devices. Different numbering of ports is also possible on different
devices.
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi new file mode 100644 index 000000000000..a7f6af56b6a5 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi @@ -0,0 +1,42 @@ +/* + * QorIQ FMan v3 10g port #1 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + */ + +fman@1a00000 { + fman0_rx_0x11: port@91000 { + cell-index = <0x11>; + compatible = "fsl,fman-v3-port-rx"; + reg = <0x91000 0x1000>; + fsl,fman-10g-port; + }; + + fman0_tx_0x31: port@b1000 { + cell-index = <0x31>; + compatible = "fsl,fman-v3-port-tx"; + reg = <0xb1000 0x1000>; + fsl,fman-10g-port; + }; + + ethernet@f2000 { + cell-index = <0x9>; + compatible = "fsl,fman-memac"; + reg = <0xf2000 0x1000>; + fsl,fman-ports = <&fman0_rx_0x11 &fman0_tx_0x31>; + pcsphy-handle = <&pcsphy7>; + }; + + mdio@f3000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xf3000 0x1000>; + + pcsphy7: ethernet-phy@0 { + reg = <0x0>; + }; + }; +}; |