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authorKefeng Wang <wangkefeng.wang@huawei.com>2016-04-08 10:27:11 +0300
committerWei Xu <xuwei5@hisilicon.com>2016-04-27 17:40:11 +0300
commitaa8d3e74f54d0af737c46c77de35b39d9a44592b (patch)
tree867d8ab49a63698f52bc8a70ddc41d37682bd626 /arch/arm64/boot/dts/hisilicon/Makefile
parent162d23bfd18cec10bd5940ff264debf3c6121f34 (diff)
downloadlinux-aa8d3e74f54d0af737c46c77de35b39d9a44592b.tar.xz
arm64: dts: Add initial dts for Hisilicon Hip06 D03 board
The Hip06 soc has same cpu topology compared with Hip05, four clusters and each cluster has quard Cortex-A57, but with different IO part, like HNS, SAS and PCI, they are all upgraded. There are also not same in ITS, MBIGEN and SMMU, etc. This patch adds the initial dts for hip06 d03 board. Note, there is no serial, because the soc use LPC uart, the serial node is not needed. Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Diffstat (limited to 'arch/arm64/boot/dts/hisilicon/Makefile')
-rw-r--r--arch/arm64/boot/dts/hisilicon/Makefile4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/hisilicon/Makefile b/arch/arm64/boot/dts/hisilicon/Makefile
index cd158b80e29b..d5f43a06b1c1 100644
--- a/arch/arm64/boot/dts/hisilicon/Makefile
+++ b/arch/arm64/boot/dts/hisilicon/Makefile
@@ -1,4 +1,6 @@
-dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb hip05-d02.dtb
+dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb
+dtb-$(CONFIG_ARCH_HISI) += hip05-d02.dtb
+dtb-$(CONFIG_ARCH_HISI) += hip06-d03.dtb
always := $(dtb-y)
subdir-y := $(dts-dirs)