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authorAndre Przywara <andre.przywara@arm.com>2020-09-07 15:18:28 +0300
committerOlof Johansson <olof@lixom.net>2020-10-03 22:56:46 +0300
commitc9794866ac30d9440b327e96b4ecc97d8f0055f6 (patch)
treee0e3a14fcaa7848d1b9746f635d8f3bbee4c642c /arch/arm64/boot/dts/lg
parentfc772314a3683ab3f19aa68a660a0f70a8e836a4 (diff)
downloadlinux-c9794866ac30d9440b327e96b4ecc97d8f0055f6.tar.xz
arm64: dts: lg: Fix SP804 users
Even though the SP804 binding allows to specify only one clock, the primecell driver requires a named clock to activate the bus clock. Specify the one clock three times and provide some clock-names, to make the DT match the SP804 and primecell binding. Also add the missing arm,primecell compatible string. Link: https://lore.kernel.org/r/20200907121831.242281-4-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm64/boot/dts/lg')
-rw-r--r--arch/arm64/boot/dts/lg/lg1312.dtsi6
-rw-r--r--arch/arm64/boot/dts/lg/lg1313.dtsi6
2 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm64/boot/dts/lg/lg1312.dtsi b/arch/arm64/boot/dts/lg/lg1312.dtsi
index 587103eb9536..081fe7a9f605 100644
--- a/arch/arm64/boot/dts/lg/lg1312.dtsi
+++ b/arch/arm64/boot/dts/lg/lg1312.dtsi
@@ -131,11 +131,11 @@
ranges;
timers: timer@fd100000 {
- compatible = "arm,sp804";
+ compatible = "arm,sp804", "arm,primecell";
reg = <0x0 0xfd100000 0x1000>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_bus>;
- clock-names = "apb_pclk";
+ clocks = <&clk_bus>, <&clk_bus>, <&clk_bus>;
+ clock-names = "timer0clk", "timer1clk", "apb_pclk";
};
wdog: watchdog@fd200000 {
compatible = "arm,sp805", "arm,primecell";
diff --git a/arch/arm64/boot/dts/lg/lg1313.dtsi b/arch/arm64/boot/dts/lg/lg1313.dtsi
index 2cea5b18aac7..604bb6975337 100644
--- a/arch/arm64/boot/dts/lg/lg1313.dtsi
+++ b/arch/arm64/boot/dts/lg/lg1313.dtsi
@@ -131,11 +131,11 @@
ranges;
timers: timer@fd100000 {
- compatible = "arm,sp804";
+ compatible = "arm,sp804", "arm,primecell";
reg = <0x0 0xfd100000 0x1000>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_bus>;
- clock-names = "apb_pclk";
+ clocks = <&clk_bus>, <&clk_bus>, <&clk_bus>;
+ clock-names = "timer0clk", "timer1clk", "apb_pclk";
};
wdog: watchdog@fd200000 {
compatible = "arm,sp805", "arm,primecell";