diff options
| author | Gregory CLEMENT <gregory.clement@free-electrons.com> | 2017-05-31 17:07:28 +0300 |
|---|---|---|
| committer | Gregory CLEMENT <gregory.clement@free-electrons.com> | 2017-06-17 09:19:04 +0300 |
| commit | 3675fb5980bf98136aa7e49f373faf57a19e3ba0 (patch) | |
| tree | b313ef14293a96666ce427716ca1bfa85e15787d /arch/arm64/boot/dts/marvell/armada-ap806.dtsi | |
| parent | 952eaa509dee29db9e3ac8b45c2087450a7ded10 (diff) | |
| download | linux-3675fb5980bf98136aa7e49f373faf57a19e3ba0.tar.xz | |
arm64: dts: marvell: use new binding for the system controller on ap806
The new binding for the system controller on ap806 moved the clock into a
subnode. This preliminary step will allow to add gpio and pinctrl
subnodes
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Diffstat (limited to 'arch/arm64/boot/dts/marvell/armada-ap806.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 19 |
1 files changed, 11 insertions, 8 deletions
diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi index 5d4f71f94b5b..ff1964d314de 100644 --- a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi @@ -197,7 +197,7 @@ #size-cells = <0>; cell-index = <0>; interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ap_syscon 3>; + clocks = <&ap_clk 3>; status = "disabled"; }; @@ -208,7 +208,7 @@ #size-cells = <0>; interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; timeout-ms = <1000>; - clocks = <&ap_syscon 3>; + clocks = <&ap_clk 3>; status = "disabled"; }; @@ -218,7 +218,7 @@ reg-shift = <2>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; reg-io-width = <1>; - clocks = <&ap_syscon 3>; + clocks = <&ap_clk 3>; status = "disabled"; }; @@ -228,7 +228,7 @@ reg-shift = <2>; interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; reg-io-width = <1>; - clocks = <&ap_syscon 3>; + clocks = <&ap_clk 3>; status = "disabled"; }; @@ -238,17 +238,20 @@ reg = <0x6e0000 0x300>; interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; clock-names = "core"; - clocks = <&ap_syscon 4>; + clocks = <&ap_clk 4>; dma-coherent; marvell,xenon-phy-slow-mode; status = "disabled"; }; ap_syscon: system-controller@6f4000 { - compatible = "marvell,ap806-system-controller", - "syscon"; - #clock-cells = <1>; + compatible = "syscon", "simple-mfd"; reg = <0x6f4000 0x1000>; + + ap_clk: clock { + compatible = "marvell,ap806-clock"; + #clock-cells = <1>; + }; }; }; }; |