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authorThierry Reding <treding@nvidia.com>2022-11-17 16:02:30 +0300
committerThierry Reding <treding@nvidia.com>2023-06-09 18:44:26 +0300
commit09d990782a243b97eb566717a2155a306a2f42af (patch)
treeed7d96cc7dba0b8d7ad23f7391e3c9cba5c11b99 /arch/arm64/boot/dts/nvidia
parentbd9681c00612a6830ecf74403584054e74646dd0 (diff)
downloadlinux-09d990782a243b97eb566717a2155a306a2f42af.tar.xz
arm64: tegra: Add Tegra234 thermal support
Add device tree node for the BPMP thermal node on Tegra234 and add thermal zone definitions. Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm64/boot/dts/nvidia')
-rw-r--r--arch/arm64/boot/dts/nvidia/tegra234.dtsi53
1 files changed, 53 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
index f5146ce7363d..f4974e81dd4b 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
@@ -8,6 +8,7 @@
#include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
#include <dt-bindings/power/tegra234-powergate.h>
#include <dt-bindings/reset/tegra234-reset.h>
+#include <dt-bindings/thermal/tegra234-bpmp-thermal.h>
/ {
compatible = "nvidia,tegra234";
@@ -3027,6 +3028,11 @@
#address-cells = <1>;
#size-cells = <0>;
};
+
+ bpmp_thermal: thermal {
+ compatible = "nvidia,tegra186-bpmp-thermal";
+ #thermal-sensor-cells = <1>;
+ };
};
cpus {
@@ -3517,6 +3523,53 @@
<&bpmp TEGRA234_CLK_PLLA_OUT0>;
};
+ thermal-zones {
+ cpu-thermal {
+ thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_CPU>;
+ status = "disabled";
+ };
+
+ gpu-thermal {
+ thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_GPU>;
+ status = "disabled";
+ };
+
+ cv0-thermal {
+ thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_CV0>;
+ status = "disabled";
+ };
+
+ cv1-thermal {
+ thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_CV1>;
+ status = "disabled";
+ };
+
+ cv2-thermal {
+ thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_CV2>;
+ status = "disabled";
+ };
+
+ soc0-thermal {
+ thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_SOC0>;
+ status = "disabled";
+ };
+
+ soc1-thermal {
+ thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_SOC1>;
+ status = "disabled";
+ };
+
+ soc2-thermal {
+ thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_SOC2>;
+ status = "disabled";
+ };
+
+ tj-thermal {
+ thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_TJ_MAX>;
+ status = "disabled";
+ };
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,