diff options
| author | Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> | 2017-10-04 13:27:31 +0300 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2017-10-10 10:51:15 +0300 |
| commit | b35334447513c14a4dd55a67c269a743d4a4824b (patch) | |
| tree | cba8c66d0010cf249ceb073c3e016a9ac1e0a726 /arch/arm64/boot/dts/renesas/r8a77995-draak.dts | |
| parent | d40a434746bf2d6dbcc01bb1a14575c11e933cc3 (diff) | |
| download | linux-b35334447513c14a4dd55a67c269a743d4a4824b.tar.xz | |
arm64: dts: renesas: r8a77995: draak: enable PWM channel 0 and 1
This patch enables PWM channel 0 and 1 on the draak. Each channel
connects to LTC2644 for brightness control.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a77995-draak.dts')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts index fac58be83383..09de73b11db8 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts @@ -46,6 +46,16 @@ }; }; + pwm0_pins: pwm0 { + groups = "pwm0_c"; + function = "pwm0"; + }; + + pwm1_pins: pwm1 { + groups = "pwm1_c"; + function = "pwm1"; + }; + scif2_pins: scif2 { groups = "scif2_data"; function = "scif2"; @@ -94,6 +104,20 @@ status = "okay"; }; +&pwm0 { + pinctrl-0 = <&pwm0_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&pwm1 { + pinctrl-0 = <&pwm1_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + &rwdt { timeout-sec = <60>; status = "okay"; |