diff options
| author | Biju Das <biju.das.jz@bp.renesas.com> | 2022-02-03 20:06:36 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-02-08 11:45:59 +0300 |
| commit | 46da632734a5979090ef588d9da40367581fd400 (patch) | |
| tree | c3fab60f19fcc1896dc08e7d5f96650daf27c232 /arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi | |
| parent | fa00d6dc19283bee13f0390546f741293f6d2d9a (diff) | |
| download | linux-46da632734a5979090ef588d9da40367581fd400.tar.xz | |
arm64: dts: renesas: rzg2lc-smarc: Enable CANFD channel 1
On RZ/G2LC SMARC EVK, CAN0 is not populated.
CAN1 is multiplexed with SCIF1 using SW1[3] or RSPI using SW1[4].
This patch adds support for the CAN1 interface on RZ/G2LC SMARC EVK.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220203170636.7747-5-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi b/arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi index ec9e08ec0822..bff56d696936 100644 --- a/arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi @@ -17,6 +17,14 @@ <RZG2L_PORT_PINMUX(38, 1, 1)>; /* RxD */ }; +#if SW_SCIF_CAN + /* SW8 should be at position 2->1 */ + can1_pins: can1 { + pinmux = <RZG2L_PORT_PINMUX(40, 0, 3)>, /* TxD */ + <RZG2L_PORT_PINMUX(40, 1, 3)>; /* RxD */ + }; +#endif + scif1_pins: scif1 { pinmux = <RZG2L_PORT_PINMUX(40, 0, 1)>, /* TxD */ <RZG2L_PORT_PINMUX(40, 1, 1)>, /* RxD */ @@ -24,6 +32,21 @@ <RZG2L_PORT_PINMUX(41, 1, 1)>; /* RTS# */ }; +#if SW_RSPI_CAN + /* SW8 should be at position 2->3 so that GPIO9_CAN1_STB line is activated */ + can1-stb { + gpio-hog; + gpios = <RZG2L_GPIO(44, 3) GPIO_ACTIVE_HIGH>; + output-low; + line-name = "can1_stb"; + }; + + can1_pins: can1 { + pinmux = <RZG2L_PORT_PINMUX(44, 0, 3)>, /* TxD */ + <RZG2L_PORT_PINMUX(44, 1, 3)>; /* RxD */ + }; +#endif + sd1-pwr-en-hog { gpio-hog; gpios = <RZG2L_GPIO(39, 2) GPIO_ACTIVE_HIGH>; |