diff options
| author | Biju Das <biju.das.jz@bp.renesas.com> | 2021-12-16 14:43:05 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-01-24 12:09:13 +0300 |
| commit | ce0c63b6a5ef86208d1008ce6c42a7a7180aaf75 (patch) | |
| tree | eed3aa862e4be586b5a3b30a8bc9e18ed540ad98 /arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi | |
| parent | 3a3c2a48d8c6ba586a2eda249b0e2f5f19609dfd (diff) | |
| download | linux-ce0c63b6a5ef86208d1008ce6c42a7a7180aaf75.tar.xz | |
arm64: dts: renesas: Add initial device tree for RZ/G2LC SMARC EVK
Add basic support for the RZ/G2LC SMARC EVK (based on R9A07G044C2):
- memory
- External input clock
- SCIF
- GbEthernet
- Audio Clock
It shares the same carrier board with RZ/G2L, but the pin mapping is
different. Disable the device nodes which are not tested and delete the
corresponding pinctrl definitions.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20211216114305.5842-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi b/arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi new file mode 100644 index 000000000000..5333a1f9a0e7 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Device Tree Source for the RZ/G2LC SMARC pincontrol parts + * + * Copyright (C) 2021 Renesas Electronics Corp. + */ + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/pinctrl/rzg2l-pinctrl.h> + +&pinctrl { + pinctrl-0 = <&sound_clk_pins>; + pinctrl-names = "default"; + + scif0_pins: scif0 { + pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>, /* TxD */ + <RZG2L_PORT_PINMUX(38, 1, 1)>; /* RxD */ + }; + + sound_clk_pins: sound_clk { + pins = "AUDIO_CLK1", "AUDIO_CLK2"; + input-enable; + }; +}; + |