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authorArnd Bergmann <arnd@arndb.de>2024-02-29 18:22:29 +0300
committerArnd Bergmann <arnd@arndb.de>2024-02-29 18:22:29 +0300
commit34eb16dedb9eaae8d6ee955be5ca2fd5d01b8ca0 (patch)
tree765e7d0f1b23170607dd59d86c01899b322d6710 /arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-wifi.dtso
parent5d9f164317e6d003b4bb100d3eab959b3aca2eab (diff)
parent4622485f005aaf0f7a684b69280d0494e0ea301e (diff)
downloadlinux-34eb16dedb9eaae8d6ee955be5ca2fd5d01b8ca0.tar.xz
Merge tag 'v6.9-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
New boards: Powkiddy RGB10MAX3, Pine64 PineTab2, NanoPi R6C+R6S, Anbernic RG-ARC S and RG-ARC D. New peripherals: rs485 on Theobroma Systems boards, usb3 on Indidroid Nova, Edgeble NCM6A (usb2, m.2, ethernet, wifi, cpu-regulator), Rock-5b rfkill for wifi, cache information for rk3399. Snmaller DT fixes (hdmi nodes, aliases, redundant card-detect gpios, max- frequency for spi-flashes on rock-pi 4 boards, missing pmu-io-domains on Ringneck) * tag 'v6.9-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (38 commits) arm64: dts: rockchip: Add USB3.0 to Indiedroid Nova arm64: dts: rockchip: adjust phy-handle name on rock-pi-e arm64: dts: rockchip: fix rk3399 hdmi ports node arm64: dts: rockchip: fix rk3328 hdmi ports node arm64: dts: rockchip: remove redundant cd-gpios from rk3588 sdmmc nodes arm64: dts: rockchip: add rs485 support on uart5 of px30-ringneck-haikou arm64: dts: rockchip: add rs485 support on uart2 of rk3399-puma-haikou arm64: dts: rockchip: Add Powkiddy RGB10MAX3 dt-bindings: arm: rockchip: Add Powkiddy RGB10MAX3 arm64: dts: rockchip: Update powkiddy rk2023 dtsi for RGB10MAX3 arm64: dts: rockchip: Add devicetree for Pine64 PineTab2 dt-bindings: arm64: rockchip: Add Pine64 PineTab2 arm64: dts: rockchip: Add Touch to Anbernic RG-ARC D arm64: dts: rockchip: fix nanopc-t6 sdmmc regulator arm64: dts: rockchip: remove duplicate SPI aliases for helios64 arm64: dts: rockchip: add spi controller aliases on rk3399 arm64: dts: rockchip: Add support for NanoPi R6C arm64: dts: rockchip: Add support for NanoPi R6S dt-bindings: arm: rockchip: Add NanoPi R6 series boards arm64: dts: rockchip: Increase maximum frequency of SPI flash for ROCK Pi 4A/B/C ... Link: https://lore.kernel.org/r/3622360.hdfAi7Kttb@diego Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-wifi.dtso')
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-wifi.dtso56
1 files changed, 56 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-wifi.dtso b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-wifi.dtso
new file mode 100644
index 000000000000..e9a3855e8752
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-wifi.dtso
@@ -0,0 +1,56 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
+ *
+ * DT-overlay for Edgeble On-SoM WiFi6/BT M.2 1216 modules,
+ * - AW-XM548NF
+ * - Intel 8260D2W
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+&{/} {
+ vcc3v3_pcie2x1l1: vcc3v3-pcie2x1l1-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; /* WIFI_3V3_EN */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie2_1_vcc3v3_en>;
+ regulator-name = "vcc3v3_pcie2x1l1";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <50000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+};
+
+&combphy2_psu {
+ status = "okay";
+};
+
+/* WiFi6 */
+&pcie2x1l1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie2_1_rst>;
+ reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; /* PCIE20_2_WIFI_PERSTn */
+ vpcie3v3-supply = <&vcc3v3_pcie2x1l1>;
+ status = "okay";
+};
+
+&pinctrl {
+ pcie2 {
+ pcie2_1_rst: pcie2-1-rst {
+ rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ pcie2_1_vcc3v3_en: pcie2-1-vcc-en {
+ rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};