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authorApurva Nandan <a-nandan@ti.com>2023-08-11 22:20:30 +0300
committerNishanth Menon <nm@ti.com>2023-08-11 23:54:18 +0300
commit68501d3cc16a7828b05ee24bdb037f697e207854 (patch)
tree314b75293d65b785e6d675bf6ebc9944c83e9894 /arch/arm64/boot/dts/ti
parentc74d8de338a553da7b0084bab2554b042375625e (diff)
downloadlinux-68501d3cc16a7828b05ee24bdb037f697e207854.tar.xz
arm64: dts: ti: k3-am69-sk: Add phase tags marking
bootph-all as phase tag was added to dt-schema (dtschema/schemas/bootph.yaml) to cover U-Boot challenges with DT. That's why add it also to Linux to be aligned with bootloader requirement. wkup_i2c0, mcu_uart0, main_uart8, main_sdhci0 and main_sdhci1 are required for bootloader operation on TI K3 AM69-SK EVM. These IPs along with pinmuxes need to be marked for all bootloader phases, hence add bootph-all to these nodes in kernel dts. Signed-off-by: Apurva Nandan <a-nandan@ti.com> Reviewed-by: Udit Kumar <u-kumar1@ti.com> Link: https://lore.kernel.org/r/20230811192030.3480616-4-a-nandan@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
Diffstat (limited to 'arch/arm64/boot/dts/ti')
-rw-r--r--arch/arm64/boot/dts/ti/k3-am69-sk.dts12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk.dts b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
index d282c2c633c1..06993709111e 100644
--- a/arch/arm64/boot/dts/ti/k3-am69-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
@@ -110,7 +110,9 @@
};
&main_pmx0 {
+ bootph-all;
main_uart8_pins_default: main-uart8-default-pins {
+ bootph-all;
pinctrl-single,pins = <
J784S4_IOPAD(0x0d0, PIN_INPUT, 11) /* (AP38) SPI0_CS1.UART8_RXD */
J784S4_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AN38) SPI0_CLK.UART8_TXD */
@@ -125,6 +127,7 @@
};
main_mmc1_pins_default: main-mmc1-default-pins {
+ bootph-all;
pinctrl-single,pins = <
J784S4_IOPAD(0x104, PIN_INPUT, 0) /* (AB38) MMC1_CLK */
J784S4_IOPAD(0x108, PIN_INPUT, 0) /* (AB36) MMC1_CMD */
@@ -164,7 +167,9 @@
};
&wkup_pmx2 {
+ bootph-all;
wkup_uart0_pins_default: wkup-uart0-default-pins {
+ bootph-all;
pinctrl-single,pins = <
J721S2_WKUP_IOPAD(0x070, PIN_INPUT, 0) /* (L37) WKUP_GPIO0_6.WKUP_UART0_CTSn */
J721S2_WKUP_IOPAD(0x074, PIN_INPUT, 0) /* (L36) WKUP_GPIO0_7.WKUP_UART0_RTSn */
@@ -174,6 +179,7 @@
};
wkup_i2c0_pins_default: wkup-i2c0-default-pins {
+ bootph-all;
pinctrl-single,pins = <
J721S2_WKUP_IOPAD(0x98, PIN_INPUT, 0) /* (N33) WKUP_I2C0_SCL */
J721S2_WKUP_IOPAD(0x9c, PIN_INPUT, 0) /* (N35) WKUP_I2C0_SDA */
@@ -181,6 +187,7 @@
};
mcu_uart0_pins_default: mcu-uart0-default-pins {
+ bootph-all;
pinctrl-single,pins = <
J784S4_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (K38) WKUP_GPIO0_13.MCU_UART0_RXD */
J784S4_WKUP_IOPAD(0x088, PIN_OUTPUT, 0) /* (J37) WKUP_GPIO0_12.MCU_UART0_TXD */
@@ -249,6 +256,7 @@
};
&wkup_i2c0 {
+ bootph-all;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&wkup_i2c0_pins_default>;
@@ -268,6 +276,7 @@
};
&mcu_uart0 {
+ bootph-all;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcu_uart0_pins_default>;
@@ -281,6 +290,7 @@
};
&main_uart8 {
+ bootph-all;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_uart8_pins_default>;
@@ -307,6 +317,7 @@
};
&main_sdhci0 {
+ bootph-all;
/* eMMC */
status = "okay";
non-removable;
@@ -315,6 +326,7 @@
};
&main_sdhci1 {
+ bootph-all;
/* SD card */
status = "okay";
pinctrl-0 = <&main_mmc1_pins_default>;