diff options
| author | Josua Mayer <josua@solid-run.com> | 2024-02-19 18:03:03 +0300 |
|---|---|---|
| committer | Vignesh Raghavendra <vigneshr@ti.com> | 2024-02-26 13:21:36 +0300 |
| commit | bbef42084cc170cbfc035bf784f2ff055c939d7e (patch) | |
| tree | 6f7fccd3203eea64243b9daa14a4f258ca7526ed /arch/arm64/boot/dts/ti | |
| parent | d60483faf914b4d404a9732476278ac13bb33b70 (diff) | |
| download | linux-bbef42084cc170cbfc035bf784f2ff055c939d7e.tar.xz | |
arm64: dts: ti: hummingboard-t: add overlays for m.2 pci-e and usb-3
HummingBoard-T features two M.2 connectors labeled "M1" and "M2".
The single SerDes lane of the SoC can be routed to either M1 pci-e
signals, or M2 usb-3 signals by a gpio-controlled mux.
Add overlays for each configuration.
Signed-off-by: Josua Mayer <josua@solid-run.com>
Link: https://lore.kernel.org/r/20240219-add-am64-som-v7-4-0e6e95b0a05d@solid-run.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Diffstat (limited to 'arch/arm64/boot/dts/ti')
| -rw-r--r-- | arch/arm64/boot/dts/ti/Makefile | 6 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-pcie.dtso | 45 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dtso | 44 |
3 files changed, 95 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 0531a368cf69..9a722c2473fb 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -38,9 +38,15 @@ dtb-$(CONFIG_ARCH_K3) += k3-am62x-sk-csi2-imx219.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am62x-sk-hdmi-audio.dtbo # Boards with AM64x SoC +k3-am642-hummingboard-t-pcie-dtbs := \ + k3-am642-hummingboard-t.dtb k3-am642-hummingboard-t-pcie.dtbo +k3-am642-hummingboard-t-usb3-dtbs := \ + k3-am642-hummingboard-t.dtb k3-am642-hummingboard-t-usb3.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am642-evm.dtb dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-icssg1-dualemac.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am642-hummingboard-t.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am642-hummingboard-t-pcie.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am642-hummingboard-t-usb3.dtb dtb-$(CONFIG_ARCH_K3) += k3-am642-phyboard-electra-rdk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am642-sk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am642-tqma64xxl-mbax4xxl.dtb diff --git a/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-pcie.dtso b/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-pcie.dtso new file mode 100644 index 000000000000..bd9a5caf20da --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-pcie.dtso @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2023 Josua Mayer <josua@solid-run.com> + * + * Overlay for SolidRun AM642 HummingBoard-T to enable PCI-E. + */ + +/dts-v1/; +/plugin/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/phy/phy.h> + +#include "k3-serdes.h" + +&pcie0_rc { + pinctrl-names = "default"; + pinctrl-0 = <&pcie0_default_pins>; + reset-gpios = <&main_gpio1 15 GPIO_ACTIVE_HIGH>; + phys = <&serdes0_link>; + phy-names = "pcie-phy"; + num-lanes = <1>; + status = "okay"; +}; + +&serdes0 { + #address-cells = <1>; + #size-cells = <0>; + + serdes0_link: phy@0 { + reg = <0>; + cdns,num-lanes = <1>; + cdns,phy-type = <PHY_TYPE_PCIE>; + #phy-cells = <0>; + resets = <&serdes_wiz0 1>; + }; +}; + +&serdes_ln_ctrl { + idle-states = <AM64_SERDES0_LANE0_PCIE0>; +}; + +&serdes_mux { + idle-state = <1>; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dtso b/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dtso new file mode 100644 index 000000000000..ffcc3bd3c7bc --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dtso @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2023 Josua Mayer <josua@solid-run.com> + * + * Overlay for SolidRun AM642 HummingBoard-T to enable USB-3.1. + */ + +/dts-v1/; +/plugin/; + +#include <dt-bindings/phy/phy.h> + +#include "k3-serdes.h" + +&serdes0 { + #address-cells = <1>; + #size-cells = <0>; + + serdes0_link: phy@0 { + reg = <0>; + cdns,num-lanes = <1>; + cdns,phy-type = <PHY_TYPE_USB3>; + #phy-cells = <0>; + resets = <&serdes_wiz0 1>; + }; +}; + +&serdes_ln_ctrl { + idle-states = <AM64_SERDES0_LANE0_USB>; +}; + +&serdes_mux { + idle-state = <0>; +}; + +&usbss0 { + /delete-property/ ti,usb2-only; +}; + +&usb0 { + maximum-speed = "super-speed"; + phys = <&serdes0_link>; + phy-names = "cdns3,usb3-phy"; +}; |