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authorMichal Simek <michal.simek@amd.com>2022-12-09 16:58:07 +0300
committerMichal Simek <michal.simek@amd.com>2023-01-05 11:53:33 +0300
commit185ffb481405bbfd5eadb47ab22395f6fe704331 (patch)
tree3b05b18864369a045b03118c2b8d02492df56bd6 /arch/arm64/boot/dts/xilinx
parent53ba1b2bdaf7f481fdd878e9c18cd0e54081fac9 (diff)
downloadlinux-185ffb481405bbfd5eadb47ab22395f6fe704331.tar.xz
arm64: dts: zynqmp: Remove clock-names from GEM in zynqmp-clk-ccf.dtsi
Remove clock-names from GEM nodes from clk-ccf because they should be only present in zynqmp.dtsi. And as is visible both clock-names defined didn't really match. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/24ce27f91a55ed04ca7ee2ff7db0c674702ef722.1670594284.git.michal.simek@amd.com
Diffstat (limited to 'arch/arm64/boot/dts/xilinx')
-rw-r--r--arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi4
-rw-r--r--arch/arm64/boot/dts/xilinx/zynqmp.dtsi8
2 files changed, 4 insertions, 8 deletions
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
index e172fa05c9a0..3e9979ab60bb 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
@@ -135,28 +135,24 @@
clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM0_REF>,
<&zynqmp_clk GEM0_TX>, <&zynqmp_clk GEM0_RX>,
<&zynqmp_clk GEM_TSU>;
- clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
};
&gem1 {
clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM1_REF>,
<&zynqmp_clk GEM1_TX>, <&zynqmp_clk GEM1_RX>,
<&zynqmp_clk GEM_TSU>;
- clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
};
&gem2 {
clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM2_REF>,
<&zynqmp_clk GEM2_TX>, <&zynqmp_clk GEM2_RX>,
<&zynqmp_clk GEM_TSU>;
- clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
};
&gem3 {
clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM3_REF>,
<&zynqmp_clk GEM3_TX>, <&zynqmp_clk GEM3_RX>,
<&zynqmp_clk GEM_TSU>;
- clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
};
&gpio {
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 9793a4e652d9..2ff4b788e094 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -545,7 +545,7 @@
interrupt-parent = <&gic>;
interrupts = <0 57 4>, <0 57 4>;
reg = <0x0 0xff0b0000 0x0 0x1000>;
- clock-names = "pclk", "hclk", "tx_clk";
+ clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
#address-cells = <1>;
#size-cells = <0>;
iommus = <&smmu 0x874>;
@@ -560,7 +560,7 @@
interrupt-parent = <&gic>;
interrupts = <0 59 4>, <0 59 4>;
reg = <0x0 0xff0c0000 0x0 0x1000>;
- clock-names = "pclk", "hclk", "tx_clk";
+ clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
#address-cells = <1>;
#size-cells = <0>;
iommus = <&smmu 0x875>;
@@ -575,7 +575,7 @@
interrupt-parent = <&gic>;
interrupts = <0 61 4>, <0 61 4>;
reg = <0x0 0xff0d0000 0x0 0x1000>;
- clock-names = "pclk", "hclk", "tx_clk";
+ clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
#address-cells = <1>;
#size-cells = <0>;
iommus = <&smmu 0x876>;
@@ -590,7 +590,7 @@
interrupt-parent = <&gic>;
interrupts = <0 63 4>, <0 63 4>;
reg = <0x0 0xff0e0000 0x0 0x1000>;
- clock-names = "pclk", "hclk", "tx_clk";
+ clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
#address-cells = <1>;
#size-cells = <0>;
iommus = <&smmu 0x877>;