diff options
author | AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2023-10-30 16:25:23 +0300 |
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committer | AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2023-12-11 13:13:00 +0300 |
commit | 3106b14c1cb4b745dd0413dc392418d301f3b1d1 (patch) | |
tree | 8764de23e6f5dc26ce270cea4aa7f94df95857ed /arch/arm64/boot | |
parent | 063821ae4b01a57d8c913f8f644a24b807f3e3b6 (diff) | |
download | linux-3106b14c1cb4b745dd0413dc392418d301f3b1d1.tar.xz |
arm64: dts: mediatek: mt8195-cherry: Assign sram supply to MFG1 pd
Add a phandle to the MT8195_POWER_DOMAIN_MFG1 power domain and
assign the GPU SRAM (vsram_others) supply to that in mt8195-cherry:
this allows to keep the sram powered up while the GPU is used.
This means that it's now possible to remove the regulator-always-on
property from the mt6359_vsram_others_ldo_reg vreg, so that it will
be switched on and off during suspend.
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Diffstat (limited to 'arch/arm64/boot')
-rw-r--r-- | arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi | 5 | ||||
-rw-r--r-- | arch/arm64/boot/dts/mediatek/mt8195.dtsi | 2 |
2 files changed, 5 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi index 07b643065a58..5cfe104ee136 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -480,6 +480,10 @@ domain-supply = <&mt6315_7_vbuck1>; }; +&mfg1 { + domain-supply = <&mt6359_vsram_others_ldo_reg>; +}; + &mmc0 { status = "okay"; @@ -550,7 +554,6 @@ /* for GPU SRAM */ &mt6359_vsram_others_ldo_reg { - regulator-always-on; regulator-min-microvolt = <750000>; regulator-max-microvolt = <750000>; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index 54c674c45b49..0d7735778709 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -538,7 +538,7 @@ #size-cells = <0>; #power-domain-cells = <1>; - power-domain@MT8195_POWER_DOMAIN_MFG1 { + mfg1: power-domain@MT8195_POWER_DOMAIN_MFG1 { reg = <MT8195_POWER_DOMAIN_MFG1>; clocks = <&apmixedsys CLK_APMIXED_MFGPLL>, <&topckgen CLK_TOP_MFG_CORE_TMP>; |