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author | Michal Simek <michal.simek@xilinx.com> | 2015-07-27 17:09:29 +0300 |
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committer | Michal Simek <michal.simek@xilinx.com> | 2015-07-31 11:46:31 +0300 |
commit | 8fd7a775c52721a440b7fa42945793459964dc4f (patch) | |
tree | ff5d09173aba755fd9881994e5cd1984f7d4dbe5 /arch/arm64/boot | |
parent | 0fcb064f0f596beb6f4952e24798142294179d67 (diff) | |
download | linux-8fd7a775c52721a440b7fa42945793459964dc4f.tar.xz |
ARM64: zynqmp: Move uart and ttcs to the right location
Sort nodes in DTSI.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm64/boot')
-rw-r--r-- | arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 120 |
1 files changed, 60 insertions, 60 deletions
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index ba1b09cc0edf..9e3d3b9c8c68 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -126,66 +126,6 @@ clock-frequency = <25000000>; }; - ttc0: timer@ff110000 { - compatible = "cdns,ttc"; - status = "disabled"; - interrupt-parent = <&gic>; - interrupts = <0 36 4>, <0 37 4>, <0 38 4>; - reg = <0x0 0xff110000 0x1000>; - clocks = <&misc_clk>; - timer-width = <32>; - }; - - ttc1: timer@ff120000 { - compatible = "cdns,ttc"; - status = "disabled"; - interrupt-parent = <&gic>; - interrupts = <0 39 4>, <0 40 4>, <0 41 4>; - reg = <0x0 0xff120000 0x1000>; - clocks = <&misc_clk>; - timer-width = <32>; - }; - - ttc2: timer@ff130000 { - compatible = "cdns,ttc"; - status = "disabled"; - interrupt-parent = <&gic>; - interrupts = <0 42 4>, <0 43 4>, <0 44 4>; - reg = <0x0 0xff130000 0x1000>; - clocks = <&misc_clk>; - timer-width = <32>; - }; - - ttc3: timer@ff140000 { - compatible = "cdns,ttc"; - status = "disabled"; - interrupt-parent = <&gic>; - interrupts = <0 45 4>, <0 46 4>, <0 47 4>; - reg = <0x0 0xff140000 0x1000>; - clocks = <&misc_clk>; - timer-width = <32>; - }; - - uart0: serial@ff000000 { - compatible = "cdns,uart-r1p8"; - status = "disabled"; - interrupt-parent = <&gic>; - interrupts = <0 21 4>; - reg = <0x0 0xff000000 0x1000>; - clock-names = "uart_clk", "pclk"; - clocks = <&misc_clk &misc_clk>; - }; - - uart1: serial@ff010000 { - compatible = "cdns,uart-r1p8"; - status = "disabled"; - interrupt-parent = <&gic>; - interrupts = <0 22 4>; - reg = <0x0 0xff010000 0x1000>; - clock-names = "uart_clk", "pclk"; - clocks = <&misc_clk &misc_clk>; - }; - gpio: gpio@ff0a0000 { compatible = "xlnx,zynqmp-gpio-1.0"; status = "disabled"; @@ -343,6 +283,66 @@ <0 157 4>, <0 157 4>, <0 157 4>, <0 157 4>; }; + ttc0: timer@ff110000 { + compatible = "cdns,ttc"; + status = "disabled"; + interrupt-parent = <&gic>; + interrupts = <0 36 4>, <0 37 4>, <0 38 4>; + reg = <0x0 0xff110000 0x1000>; + clocks = <&misc_clk>; + timer-width = <32>; + }; + + ttc1: timer@ff120000 { + compatible = "cdns,ttc"; + status = "disabled"; + interrupt-parent = <&gic>; + interrupts = <0 39 4>, <0 40 4>, <0 41 4>; + reg = <0x0 0xff120000 0x1000>; + clocks = <&misc_clk>; + timer-width = <32>; + }; + + ttc2: timer@ff130000 { + compatible = "cdns,ttc"; + status = "disabled"; + interrupt-parent = <&gic>; + interrupts = <0 42 4>, <0 43 4>, <0 44 4>; + reg = <0x0 0xff130000 0x1000>; + clocks = <&misc_clk>; + timer-width = <32>; + }; + + ttc3: timer@ff140000 { + compatible = "cdns,ttc"; + status = "disabled"; + interrupt-parent = <&gic>; + interrupts = <0 45 4>, <0 46 4>, <0 47 4>; + reg = <0x0 0xff140000 0x1000>; + clocks = <&misc_clk>; + timer-width = <32>; + }; + + uart0: serial@ff000000 { + compatible = "cdns,uart-r1p8"; + status = "disabled"; + interrupt-parent = <&gic>; + interrupts = <0 21 4>; + reg = <0x0 0xff000000 0x1000>; + clock-names = "uart_clk", "pclk"; + clocks = <&misc_clk &misc_clk>; + }; + + uart1: serial@ff010000 { + compatible = "cdns,uart-r1p8"; + status = "disabled"; + interrupt-parent = <&gic>; + interrupts = <0 22 4>; + reg = <0x0 0xff010000 0x1000>; + clock-names = "uart_clk", "pclk"; + clocks = <&misc_clk &misc_clk>; + }; + usb0: usb@fe200000 { compatible = "snps,dwc3"; status = "disabled"; |