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| author | Arnd Bergmann <arnd@arndb.de> | 2023-06-21 12:04:00 +0300 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2023-06-21 12:04:01 +0300 |
| commit | 168269abf5394bf0eca334e1c2478bc51cec3077 (patch) | |
| tree | c9aff7dae23f503f3bf1a5931f05d75012fc1738 /arch/arm64/configs | |
| parent | c0ab597fa2060823cf727dd56bf8a3a0efba88ef (diff) | |
| parent | a19a3dcb0d190254ded4ac1cabb0f402e4b7c8c4 (diff) | |
| download | linux-168269abf5394bf0eca334e1c2478bc51cec3077.tar.xz | |
Merge tag 'qcom-arm64-defconfig-for-6.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/defconfig
More Qualcomm ARM64 defconfig updates for v6.5
This enables various clock drivers for QCM2290, SM6115 and SC8280XP.
Furhter, the interconnect and the MSM power manageer (MPM) drivers are
enabled to allow QCM2290 to boot.
* tag 'qcom-arm64-defconfig-for-6.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
arm64: defconfig: Build SM6115 display and GPU clock controller drivers
arm64: defconfig: Build display clock controller driver for QCM2290
arm64: defconfig: Build interconnect driver for QCM2290
arm64: defconfig: Build Global Clock Controller driver for QCM2290
arm64: defconfig: Build MSM power manager driver
arm64: defconfig: Enable sc828x0xp lpasscc clock controller
Link: https://lore.kernel.org/r/20230615154119.1460952-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm64/configs')
| -rw-r--r-- | arch/arm64/configs/defconfig | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 328f6a204698..014ec8821b94 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1174,6 +1174,8 @@ CONFIG_MSM_MMCC_8994=m CONFIG_MSM_MMCC_8996=m CONFIG_MSM_MMCC_8998=m CONFIG_MSM_GCC_8998=y +CONFIG_QCM_GCC_2290=y +CONFIG_QCM_DISPCC_2290=m CONFIG_QCS_GCC_404=y CONFIG_SA_GCC_8775P=y CONFIG_SC_DISPCC_8280XP=m @@ -1182,12 +1184,14 @@ CONFIG_SC_GCC_7180=y CONFIG_SC_GCC_7280=y CONFIG_SC_GCC_8180X=y CONFIG_SC_GCC_8280XP=y +CONFIG_SC_LPASSCC_8280XP=m CONFIG_SDM_CAMCC_845=m CONFIG_SDM_GPUCC_845=y CONFIG_SDM_VIDEOCC_845=y CONFIG_SDM_DISPCC_845=y CONFIG_SDM_LPASSCC_845=m CONFIG_SM_CAMCC_8250=m +CONFIG_SM_DISPCC_6115=m CONFIG_SM_DISPCC_8250=y CONFIG_SM_DISPCC_8450=m CONFIG_SM_DISPCC_8550=m @@ -1196,6 +1200,7 @@ CONFIG_SM_GCC_8350=y CONFIG_SM_GCC_8450=y CONFIG_SM_GCC_8550=y CONFIG_SM_TCSRCC_8550=y +CONFIG_SM_GPUCC_6115=m CONFIG_SM_GPUCC_8150=y CONFIG_SM_GPUCC_8250=y CONFIG_SM_VIDEOCC_8250=y @@ -1334,6 +1339,7 @@ CONFIG_PWM_TEGRA=m CONFIG_PWM_VISCONTI=m CONFIG_SL28CPLD_INTC=y CONFIG_QCOM_PDC=y +CONFIG_QCOM_MPM=y CONFIG_RESET_IMX7=y CONFIG_RESET_QCOM_AOSS=y CONFIG_RESET_QCOM_PDC=m @@ -1424,6 +1430,7 @@ CONFIG_INTERCONNECT_QCOM=y CONFIG_INTERCONNECT_QCOM_MSM8916=m CONFIG_INTERCONNECT_QCOM_MSM8996=m CONFIG_INTERCONNECT_QCOM_OSM_L3=m +CONFIG_INTERCONNECT_QCOM_QCM2290=m CONFIG_INTERCONNECT_QCOM_QCS404=m CONFIG_INTERCONNECT_QCOM_SA8775P=y CONFIG_INTERCONNECT_QCOM_SC7180=y |