Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull arm64 updates from Catalin Marinas:

 - Support for arm64 SME 2 and 2.1. SME2 introduces a new 512-bit
   architectural register (ZT0, for the look-up table feature) that
   Linux needs to save/restore

 - Include TPIDR2 in the signal context and add the corresponding
   kselftests

 - Perf updates: Arm SPEv1.2 support, HiSilicon uncore PMU updates, ACPI
   support to the Marvell DDR and TAD PMU drivers, reset DTM_PMU_CONFIG
   (ARM CMN) at probe time

 - Support for DYNAMIC_FTRACE_WITH_CALL_OPS on arm64

 - Permit EFI boot with MMU and caches on. Instead of cleaning the
   entire loaded kernel image to the PoC and disabling the MMU and
   caches before branching to the kernel bare metal entry point, leave
   the MMU and caches enabled and rely on EFI's cacheable 1:1 mapping of
   all of system RAM to populate the initial page tables

 - Expose the AArch32 (compat) ELF_HWCAP features to user in an arm64
   kernel (the arm32 kernel only defines the values)

 - Harden the arm64 shadow call stack pointer handling: stash the shadow
   stack pointer in the task struct on interrupt, load it directly from
   this structure

 - Signal handling cleanups to remove redundant validation of size
   information and avoid reading the same data from userspace twice

 - Refactor the hwcap macros to make use of the automatically generated
   ID registers. It should make new hwcaps writing less error prone

 - Further arm64 sysreg conversion and some fixes

 - arm64 kselftest fixes and improvements

 - Pointer authentication cleanups: don't sign leaf functions, unify
   asm-arch manipulation

 - Pseudo-NMI code generation optimisations

 - Minor fixes for SME and TPIDR2 handling

 - Miscellaneous updates: ARCH_FORCE_MAX_ORDER is now selectable,
   replace strtobool() to kstrtobool() in the cpufeature.c code, apply
   dynamic shadow call stack in two passes, intercept pfn changes in
   set_pte_at() without the required break-before-make sequence, attempt
   to dump all instructions on unhandled kernel faults

* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (130 commits)
  arm64: fix .idmap.text assertion for large kernels
  kselftest/arm64: Don't require FA64 for streaming SVE+ZA tests
  kselftest/arm64: Copy whole EXTRA context
  arm64: kprobes: Drop ID map text from kprobes blacklist
  perf: arm_spe: Print the version of SPE detected
  perf: arm_spe: Add support for SPEv1.2 inverted event filtering
  perf: Add perf_event_attr::config3
  arm64/sme: Fix __finalise_el2 SMEver check
  drivers/perf: fsl_imx8_ddr_perf: Remove set-but-not-used variable
  arm64/signal: Only read new data when parsing the ZT context
  arm64/signal: Only read new data when parsing the ZA context
  arm64/signal: Only read new data when parsing the SVE context
  arm64/signal: Avoid rereading context frame sizes
  arm64/signal: Make interface for restore_fpsimd_context() consistent
  arm64/signal: Remove redundant size validation from parse_user_sigframe()
  arm64/signal: Don't redundantly verify FPSIMD magic
  arm64/cpufeature: Use helper macros to specify hwcaps
  arm64/cpufeature: Always use symbolic name for feature value in hwcaps
  arm64/sysreg: Initial unsigned annotations for ID registers
  arm64/sysreg: Initial annotation of signed ID registers
  ...

3 files changed, 400 insertions, 195 deletions

diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps
index dfeb2c51e257..10dcfa13390a 100644
--- a/arch/arm64/tools/cpucaps
+++ b/arch/arm64/tools/cpucaps
@@ -28,7 +28,9 @@ HAS_GENERIC_AUTH
 HAS_GENERIC_AUTH_ARCH_QARMA3
 HAS_GENERIC_AUTH_ARCH_QARMA5
 HAS_GENERIC_AUTH_IMP_DEF
-HAS_IRQ_PRIO_MASKING
+HAS_GIC_CPUIF_SYSREGS
+HAS_GIC_PRIO_MASKING
+HAS_GIC_PRIO_RELAXED_SYNC
 HAS_LDAPR
 HAS_LSE_ATOMICS
 HAS_NO_FPSIMD
@@ -38,7 +40,6 @@ HAS_RAS_EXTN
 HAS_RNG
 HAS_SB
 HAS_STAGE2_FWB
-HAS_SYSREG_GIC_CPUIF
 HAS_TIDCP1
 HAS_TLB_RANGE
 HAS_VIRT_HOST_EXTN
@@ -50,6 +51,7 @@ MTE
 MTE_ASYMM
 SME
 SME_FA64
+SME2
 SPECTRE_V2
 SPECTRE_V3A
 SPECTRE_V4
diff --git a/arch/arm64/tools/gen-sysreg.awk b/arch/arm64/tools/gen-sysreg.awk
index c350164a3955..7f27d66a17e1 100755
--- a/arch/arm64/tools/gen-sysreg.awk
+++ b/arch/arm64/tools/gen-sysreg.awk
@@ -44,6 +44,11 @@ function define_field(reg, field, msb, lsb) {
 	define(reg "_" field "_WIDTH", msb - lsb + 1)
 }
 
+# Print a field _SIGNED definition for a field
+function define_field_sign(reg, field, sign) {
+	define(reg "_" field "_SIGNED", sign)
+}
+
 # Parse a "<msb>[:<lsb>]" string into the global variables @msb and @lsb
 function parse_bitdef(reg, field, bitdef, _bits)
 {
@@ -233,6 +238,30 @@ END {
 	next
 }
 
+/^SignedEnum/ {
+	change_block("Enum<", "Sysreg", "Enum")
+	expect_fields(3)
+	field = $3
+	parse_bitdef(reg, field, $2)
+
+	define_field(reg, field, msb, lsb)
+	define_field_sign(reg, field, "true")
+
+	next
+}
+
+/^UnsignedEnum/ {
+	change_block("Enum<", "Sysreg", "Enum")
+	expect_fields(3)
+	field = $3
+	parse_bitdef(reg, field, $2)
+
+	define_field(reg, field, msb, lsb)
+	define_field_sign(reg, field, "false")
+
+	next
+}
+
 /^Enum/ {
 	change_block("Enum", "Sysreg", "Enum")
 	expect_fields(3)
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 184e58fd5631..94d78acafb67 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -48,26 +48,26 @@
 
 Sysreg ID_PFR0_EL1	3	0	0	1	0
 Res0	63:32
-Enum	31:28	RAS
+UnsignedEnum	31:28	RAS
 	0b0000	NI
 	0b0001	RAS
 	0b0010	RASv1p1
 EndEnum
-Enum	27:24	DIT
+UnsignedEnum	27:24	DIT
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	23:20	AMU
+UnsignedEnum	23:20	AMU
 	0b0000	NI
 	0b0001	AMUv1
 	0b0010	AMUv1p1
 EndEnum
-Enum	19:16	CSV2
+UnsignedEnum	19:16	CSV2
 	0b0000	UNDISCLOSED
 	0b0001	IMP
 	0b0010	CSV2p1
 EndEnum
-Enum	15:12	State3
+UnsignedEnum	15:12	State3
 	0b0000	NI
 	0b0001	IMP
 EndEnum
@@ -76,12 +76,12 @@ Enum	11:8	State2
 	0b0001	NO_CV
 	0b0010	CV
 EndEnum
-Enum	7:4	State1
+UnsignedEnum	7:4	State1
 	0b0000	NI
 	0b0001	THUMB
 	0b0010	THUMB2
 EndEnum
-Enum	3:0	State0
+UnsignedEnum	3:0	State0
 	0b0000	NI
 	0b0001	IMP
 EndEnum
@@ -89,12 +89,12 @@ EndSysreg
 
 Sysreg ID_PFR1_EL1	3	0	0	1	1
 Res0	63:32
-Enum	31:28	GIC
+UnsignedEnum	31:28	GIC
 	0b0000	NI
 	0b0001	GICv3
 	0b0010	GICv4p1
 EndEnum
-Enum	27:24	Virt_frac
+UnsignedEnum	27:24	Virt_frac
 	0b0000	NI
 	0b0001	IMP
 EndEnum
@@ -103,16 +103,16 @@ Enum	23:20	Sec_frac
 	0b0001	WALK_DISABLE
 	0b0010	SECURE_MEMORY
 EndEnum
-Enum	19:16	GenTimer
+UnsignedEnum	19:16	GenTimer
 	0b0000	NI
 	0b0001	IMP
 	0b0010	ECV
 EndEnum
-Enum	15:12	Virtualization
+UnsignedEnum	15:12	Virtualization
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	11:8	MProgMod
+UnsignedEnum	11:8	MProgMod
 	0b0000	NI
 	0b0001	IMP
 EndEnum
@@ -121,7 +121,7 @@ Enum	7:4	Security
 	0b0001	EL3
 	0b0001	NSACR_RFR
 EndEnum
-Enum	3:0	ProgMod
+UnsignedEnum	3:0	ProgMod
 	0b0000	NI
 	0b0001	IMP
 EndEnum
@@ -129,11 +129,11 @@ EndSysreg
 
 Sysreg ID_DFR0_EL1	3	0	0	1	2
 Res0	63:32
-Enum	31:28	TraceFilt
+UnsignedEnum	31:28	TraceFilt
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	27:24	PerfMon
+UnsignedEnum	27:24	PerfMon
 	0b0000	NI
 	0b0001	PMUv1
 	0b0010	PMUv2
@@ -192,7 +192,7 @@ Enum	31:28	InnerShr
 	0b0001	HW
 	0b1111	IGNORED
 EndEnum
-Enum	27:24	FCSE
+UnsignedEnum	27:24	FCSE
 	0b0000	NI
 	0b0001	IMP
 EndEnum
@@ -369,7 +369,7 @@ Enum	27:24	Divide
 	0b0001	xDIV_T32
 	0b0010	xDIV_A32
 EndEnum
-Enum	23:20	Debug
+UnsignedEnum	23:20	Debug
 	0b0000	NI
 	0b0001	IMP
 EndEnum
@@ -380,19 +380,19 @@ Enum	19:16	Coproc
 	0b0011	MRRC
 	0b0100	MRRC2
 EndEnum
-Enum	15:12	CmpBranch
+UnsignedEnum	15:12	CmpBranch
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	11:8	BitField
+UnsignedEnum	11:8	BitField
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	7:4	BitCount
+UnsignedEnum	7:4	BitCount
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	3:0	Swap
+UnsignedEnum	3:0	Swap
 	0b0000	NI
 	0b0001	IMP
 EndEnum
@@ -562,33 +562,33 @@ EndSysreg
 
 Sysreg ID_ISAR5_EL1	3	0	0	2	5
 Res0	63:32
-Enum	31:28	VCMA
+UnsignedEnum	31:28	VCMA
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	27:24	RDM
+UnsignedEnum	27:24	RDM
 	0b0000	NI
 	0b0001	IMP
 EndEnum
 Res0	23:20
-Enum	19:16	CRC32
+UnsignedEnum	19:16	CRC32
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	15:12	SHA2
+UnsignedEnum	15:12	SHA2
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	11:8	SHA1
+UnsignedEnum	11:8	SHA1
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	7:4	AES
+UnsignedEnum	7:4	AES
 	0b0000	NI
 	0b0001	IMP
 	0b0010  VMULL
 EndEnum
-Enum	3:0	SEVL
+UnsignedEnum	3:0	SEVL
 	0b0000	NI
 	0b0001	IMP
 EndEnum
@@ -596,31 +596,31 @@ EndSysreg
 
 Sysreg ID_ISAR6_EL1	3	0	0	2	7
 Res0	63:28
-Enum	27:24	I8MM
+UnsignedEnum	27:24	I8MM
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	23:20	BF16
+UnsignedEnum	23:20	BF16
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	19:16	SPECRES
+UnsignedEnum	19:16	SPECRES
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	15:12	SB
+UnsignedEnum	15:12	SB
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	11:8	FHM
+UnsignedEnum	11:8	FHM
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	7:4	DP
+UnsignedEnum	7:4	DP
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	3:0	JSCVT
+UnsignedEnum	3:0	JSCVT
 	0b0000	NI
 	0b0001	IMP
 EndEnum
@@ -628,37 +628,37 @@ EndSysreg
 
 Sysreg ID_MMFR4_EL1	3	0	0	2	6
 Res0	63:32
-Enum	31:28	EVT
+UnsignedEnum	31:28	EVT
 	0b0000	NI
 	0b0001	NO_TLBIS
 	0b0010	TLBIS
 EndEnum
-Enum	27:24	CCIDX
+UnsignedEnum	27:24	CCIDX
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	23:20	LSM
+UnsignedEnum	23:20	LSM
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	19:16	HPDS
+UnsignedEnum	19:16	HPDS
 	0b0000	NI
 	0b0001	AA32HPD
 	0b0010	HPDS2
 EndEnum
-Enum	15:12	CnP
+UnsignedEnum	15:12	CnP
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	11:8	XNX
+UnsignedEnum	11:8	XNX
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	7:4	AC2
+UnsignedEnum	7:4	AC2
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	3:0	SpecSEI
+UnsignedEnum	3:0	SpecSEI
 	0b0000	NI
 	0b0001	IMP
 EndEnum
@@ -666,77 +666,77 @@ EndSysreg
 
 Sysreg MVFR0_EL1	3	0	0	3	0
 Res0	63:32
-Enum	31:28	FPRound
+UnsignedEnum	31:28	FPRound
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	27:24	FPShVec
+UnsignedEnum	27:24	FPShVec
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	23:20	FPSqrt
+UnsignedEnum	23:20	FPSqrt
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	19:16	FPDivide
+UnsignedEnum	19:16	FPDivide
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	15:12	FPTrap
+UnsignedEnum	15:12	FPTrap
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	11:8	FPDP
+UnsignedEnum	11:8	FPDP
 	0b0000	NI
 	0b0001	VFPv2
-	0b0001	VFPv3
+	0b0010	VFPv3
 EndEnum
-Enum	7:4	FPSP
+UnsignedEnum	7:4	FPSP
 	0b0000	NI
 	0b0001	VFPv2
-	0b0001	VFPv3
+	0b0010	VFPv3
 EndEnum
 Enum	3:0	SIMDReg
 	0b0000	NI
 	0b0001	IMP_16x64
-	0b0001	IMP_32x64
+	0b0010	IMP_32x64
 EndEnum
 EndSysreg
 
 Sysreg MVFR1_EL1	3	0	0	3	1
 Res0	63:32
-Enum	31:28	SIMDFMAC
+UnsignedEnum	31:28	SIMDFMAC
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	27:24	FPHP
+UnsignedEnum	27:24	FPHP
 	0b0000	NI
 	0b0001	FPHP
 	0b0010	FPHP_CONV
 	0b0011	FP16
 EndEnum
-Enum	23:20	SIMDHP
+UnsignedEnum	23:20	SIMDHP
 	0b0000	NI
 	0b0001	SIMDHP
-	0b0001	SIMDHP_FLOAT
+	0b0010	SIMDHP_FLOAT
 EndEnum
-Enum	19:16	SIMDSP
+UnsignedEnum	19:16	SIMDSP
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	15:12	SIMDInt
+UnsignedEnum	15:12	SIMDInt
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	11:8	SIMDLS
+UnsignedEnum	11:8	SIMDLS
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	7:4	FPDNaN
+UnsignedEnum	7:4	FPDNaN
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	3:0	FPFtZ
+UnsignedEnum	3:0	FPFtZ
 	0b0000	NI
 	0b0001	IMP
 EndEnum
@@ -761,15 +761,15 @@ EndSysreg
 
 Sysreg ID_PFR2_EL1	3	0	0	3	4
 Res0	63:12
-Enum	11:8	RAS_frac
+UnsignedEnum	11:8	RAS_frac
 	0b0000	NI
 	0b0001	RASv1p1
 EndEnum
-Enum	7:4	SSBS
+UnsignedEnum	7:4	SSBS
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	3:0	CSV3
+UnsignedEnum	3:0	CSV3
 	0b0000	NI
 	0b0001	IMP
 EndEnum
@@ -777,7 +777,7 @@ EndSysreg
 
 Sysreg ID_DFR1_EL1	3	0	0	3	5
 Res0	63:8
-Enum	7:4	HPMN0
+UnsignedEnum	7:4	HPMN0
 	0b0000	NI
 	0b0001	IMP
 EndEnum
@@ -790,87 +790,87 @@ EndSysreg
 
 Sysreg ID_MMFR5_EL1	3	0	0	3	6
 Res0	63:8
-Enum	7:4	nTLBPA
+UnsignedEnum	7:4	nTLBPA
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	3:0	ETS
+UnsignedEnum	3:0	ETS
 	0b0000	NI
 	0b0001	IMP
 EndEnum
 EndSysreg
 
 Sysreg	ID_AA64PFR0_EL1	3	0	0	4	0
-Enum	63:60	CSV3
+UnsignedEnum	63:60	CSV3
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	59:56	CSV2
+UnsignedEnum	59:56	CSV2
 	0b0000	NI
 	0b0001	IMP
 	0b0010	CSV2_2
 	0b0011	CSV2_3
 EndEnum
-Enum	55:52	RME
+UnsignedEnum	55:52	RME
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	51:48	DIT
+UnsignedEnum	51:48	DIT
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	47:44	AMU
+UnsignedEnum	47:44	AMU
 	0b0000	NI
 	0b0001	IMP
 	0b0010	V1P1
 EndEnum
-Enum	43:40	MPAM
+UnsignedEnum	43:40	MPAM
 	0b0000	0
 	0b0001	1
 EndEnum
-Enum	39:36	SEL2
+UnsignedEnum	39:36	SEL2
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	35:32	SVE
+UnsignedEnum	35:32	SVE
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	31:28	RAS
+UnsignedEnum	31:28	RAS
 	0b0000	NI
 	0b0001	IMP
 	0b0010	V1P1
 EndEnum
-Enum	27:24	GIC
+UnsignedEnum	27:24	GIC
 	0b0000	NI
 	0b0001	IMP
 	0b0010	V4P1
 EndEnum
-Enum	23:20	AdvSIMD
+SignedEnum	23:20	AdvSIMD
 	0b0000	IMP
 	0b0001	FP16
 	0b1111	NI
 EndEnum
-Enum	19:16	FP
+SignedEnum	19:16	FP
 	0b0000	IMP
 	0b0001	FP16
 	0b1111	NI
 EndEnum
-Enum	15:12	EL3
+UnsignedEnum	15:12	EL3
 	0b0000	NI
 	0b0001	IMP
 	0b0010	AARCH32
 EndEnum
-Enum	11:8	EL2
+UnsignedEnum	11:8	EL2
 	0b0000	NI
 	0b0001	IMP
 	0b0010	AARCH32
 EndEnum
-Enum	7:4	EL1
+UnsignedEnum	7:4	EL1
 	0b0001	IMP
 	0b0010	AARCH32
 EndEnum
-Enum	3:0	EL0
+UnsignedEnum	3:0	EL0
 	0b0001	IMP
 	0b0010	AARCH32
 EndEnum
@@ -878,44 +878,45 @@ EndSysreg
 
 Sysreg	ID_AA64PFR1_EL1	3	0	0	4	1
 Res0	63:40
-Enum	39:36	NMI
+UnsignedEnum	39:36	NMI
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	35:32	CSV2_frac
+UnsignedEnum	35:32	CSV2_frac
 	0b0000	NI
 	0b0001	CSV2_1p1
 	0b0010	CSV2_1p2
 EndEnum
-Enum	31:28	RNDR_trap
+UnsignedEnum	31:28	RNDR_trap
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	27:24	SME
+UnsignedEnum	27:24	SME
 	0b0000	NI
 	0b0001	IMP
+	0b0010	SME2
 EndEnum
 Res0	23:20
-Enum	19:16	MPAM_frac
+UnsignedEnum	19:16	MPAM_frac
 	0b0000	MINOR_0
 	0b0001	MINOR_1
 EndEnum
-Enum	15:12	RAS_frac
+UnsignedEnum	15:12	RAS_frac
 	0b0000	NI
 	0b0001	RASv1p1
 EndEnum
-Enum	11:8	MTE
+UnsignedEnum	11:8	MTE
 	0b0000	NI
 	0b0001	IMP
 	0b0010	MTE2
 	0b0011	MTE3
 EndEnum
-Enum	7:4	SSBS
+UnsignedEnum	7:4	SSBS
 	0b0000	NI
 	0b0001	IMP
 	0b0010	SSBS2
 EndEnum
-Enum	3:0	BT
+UnsignedEnum	3:0	BT
 	0b0000	NI
 	0b0001	IMP
 EndEnum
@@ -923,45 +924,45 @@ EndSysreg
 
 Sysreg	ID_AA64ZFR0_EL1	3	0	0	4	4
 Res0	63:60
-Enum	59:56	F64MM
+UnsignedEnum	59:56	F64MM
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	55:52	F32MM
+UnsignedEnum	55:52	F32MM
 	0b0000	NI
 	0b0001	IMP
 EndEnum
 Res0	51:48
-Enum	47:44	I8MM
+UnsignedEnum	47:44	I8MM
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	43:40	SM4
+UnsignedEnum	43:40	SM4
 	0b0000	NI
 	0b0001	IMP
 EndEnum
 Res0	39:36
-Enum	35:32	SHA3
+UnsignedEnum	35:32	SHA3
 	0b0000	NI
 	0b0001	IMP
 EndEnum
 Res0	31:24
-Enum	23:20	BF16
+UnsignedEnum	23:20	BF16
 	0b0000	NI
 	0b0001	IMP
 	0b0010	EBF16
 EndEnum
-Enum	19:16	BitPerm
+UnsignedEnum	19:16	BitPerm
 	0b0000	NI
 	0b0001	IMP
 EndEnum
 Res0	15:8
-Enum	7:4	AES
+UnsignedEnum	7:4	AES
 	0b0000	NI
 	0b0001	IMP
 	0b0010	PMULL128
 EndEnum
-Enum	3:0	SVEver
+UnsignedEnum	3:0	SVEver
 	0b0000	IMP
 	0b0001	SVE2
 	0b0010	SVE2p1
@@ -969,38 +970,56 @@ EndEnum
 EndSysreg
 
 Sysreg	ID_AA64SMFR0_EL1	3	0	0	4	5
-Enum	63	FA64
+UnsignedEnum	63	FA64
 	0b0	NI
 	0b1	IMP
 EndEnum
 Res0	62:60
-Enum	59:56	SMEver
+UnsignedEnum	59:56	SMEver
+	0b0000	SME
+	0b0001	SME2
+	0b0010	SME2p1
 	0b0000	IMP
 EndEnum
-Enum	55:52	I16I64
+UnsignedEnum	55:52	I16I64
 	0b0000	NI
 	0b1111	IMP
 EndEnum
 Res0	51:49
-Enum	48	F64F64
+UnsignedEnum	48	F64F64
 	0b0	NI
 	0b1	IMP
 EndEnum
-Res0	47:40
-Enum	39:36	I8I32
+UnsignedEnum	47:44	I16I32
+	0b0000	NI
+	0b0101	IMP
+EndEnum
+UnsignedEnum	43	B16B16
+	0b0	NI
+	0b1	IMP
+EndEnum
+UnsignedEnum	42	F16F16
+	0b0	NI
+	0b1	IMP
+EndEnum
+Res0	41:40
+UnsignedEnum	39:36	I8I32
 	0b0000	NI
 	0b1111	IMP
 EndEnum
-Enum	35	F16F32
+UnsignedEnum	35	F16F32
+	0b0	NI
+	0b1	IMP
+EndEnum
+UnsignedEnum	34	B16F32
 	0b0	NI
 	0b1	IMP
 EndEnum
-Enum	34	B16F32
+UnsignedEnum	33	BI32I32
 	0b0	NI
 	0b1	IMP
 EndEnum
-Res0	33
-Enum	32	F32F32
+UnsignedEnum	32	F32F32
 	0b0	NI
 	0b1	IMP
 EndEnum
@@ -1013,7 +1032,7 @@ Enum	63:60	HPMN0
 	0b0001	DEF
 EndEnum
 Res0	59:56
-Enum	55:52	BRBE
+UnsignedEnum	55:52	BRBE
 	0b0000	NI
 	0b0001	IMP
 	0b0010	BRBE_V1P1
@@ -1023,19 +1042,19 @@ Enum	51:48	MTPMU
 	0b0001	IMP
 	0b1111	NI
 EndEnum
-Enum	47:44	TraceBuffer
+UnsignedEnum	47:44	TraceBuffer
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	43:40	TraceFilt
+UnsignedEnum	43:40	TraceFilt
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	39:36	DoubleLock
+UnsignedEnum	39:36	DoubleLock
 	0b0000	IMP
 	0b1111	NI
 EndEnum
-Enum	35:32	PMSVer
+UnsignedEnum	35:32	PMSVer
 	0b0000	NI
 	0b0001	IMP
 	0b0010	V1P1
@@ -1047,7 +1066,7 @@ Res0	27:24
 Field	23:20	WRPs
 Res0	19:16
 Field	15:12	BRPs
-Enum	11:8	PMUVer
+UnsignedEnum	11:8	PMUVer
 	0b0000	NI
 	0b0001	IMP
 	0b0100	V3P1
@@ -1057,11 +1076,11 @@ Enum	11:8	PMUVer
 	0b1000	V3P8
 	0b1111	IMP_DEF
 EndEnum
-Enum	7:4	TraceVer
+UnsignedEnum	7:4	TraceVer
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	3:0	DebugVer
+UnsignedEnum	3:0	DebugVer
 	0b0110	IMP
 	0b0111	VHE
 	0b1000	V8P2
@@ -1091,66 +1110,66 @@ Res0	63:0
 EndSysreg
 
 Sysreg	ID_AA64ISAR0_EL1	3	0	0	6	0
-Enum	63:60	RNDR
+UnsignedEnum	63:60	RNDR
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	59:56	TLB
+UnsignedEnum	59:56	TLB
 	0b0000	NI
 	0b0001	OS
 	0b0010	RANGE
 EndEnum
-Enum	55:52	TS
+UnsignedEnum	55:52	TS
 	0b0000	NI
 	0b0001	FLAGM
 	0b0010	FLAGM2
 EndEnum
-Enum	51:48	FHM
+UnsignedEnum	51:48	FHM
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	47:44	DP
+UnsignedEnum	47:44	DP
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	43:40	SM4
+UnsignedEnum	43:40	SM4
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	39:36	SM3
+UnsignedEnum	39:36	SM3
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	35:32	SHA3
+UnsignedEnum	35:32	SHA3
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	31:28	RDM
+UnsignedEnum	31:28	RDM
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	27:24	TME
+UnsignedEnum	27:24	TME
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	23:20	ATOMIC
+UnsignedEnum	23:20	ATOMIC
 	0b0000	NI
 	0b0010	IMP
 EndEnum
-Enum	19:16	CRC32
+UnsignedEnum	19:16	CRC32
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	15:12	SHA2
+UnsignedEnum	15:12	SHA2
 	0b0000	NI
 	0b0001	SHA256
 	0b0010	SHA512
 EndEnum
-Enum	11:8	SHA1
+UnsignedEnum	11:8	SHA1
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	7:4	AES
+UnsignedEnum	7:4	AES
 	0b0000	NI
 	0b0001	AES
 	0b0010	PMULL
@@ -1159,63 +1178,63 @@ Res0	3:0
 EndSysreg
 
 Sysreg	ID_AA64ISAR1_EL1	3	0	0	6	1
-Enum	63:60	LS64
+UnsignedEnum	63:60	LS64
 	0b0000	NI
 	0b0001	LS64
 	0b0010	LS64_V
 	0b0011	LS64_ACCDATA
 EndEnum
-Enum	59:56	XS
+UnsignedEnum	59:56	XS
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	55:52	I8MM
+UnsignedEnum	55:52	I8MM
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	51:48	DGH
+UnsignedEnum	51:48	DGH
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	47:44	BF16
+UnsignedEnum	47:44	BF16
 	0b0000	NI
 	0b0001	IMP
 	0b0010	EBF16
 EndEnum
-Enum	43:40	SPECRES
+UnsignedEnum	43:40	SPECRES
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	39:36	SB
+UnsignedEnum	39:36	SB
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	35:32	FRINTTS
+UnsignedEnum	35:32	FRINTTS
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	31:28	GPI
+UnsignedEnum	31:28	GPI
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	27:24	GPA
+UnsignedEnum	27:24	GPA
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	23:20	LRCPC
+UnsignedEnum	23:20	LRCPC
 	0b0000	NI
 	0b0001	IMP
 	0b0010	LRCPC2
 EndEnum
-Enum	19:16	FCMA
+UnsignedEnum	19:16	FCMA
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	15:12	JSCVT
+UnsignedEnum	15:12	JSCVT
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	11:8	API
+UnsignedEnum	11:8	API
 	0b0000	NI
 	0b0001	PAuth
 	0b0010	EPAC
@@ -1223,7 +1242,7 @@ Enum	11:8	API
 	0b0100	FPAC
 	0b0101	FPACCOMBINE
 EndEnum
-Enum	7:4	APA
+UnsignedEnum	7:4	APA
 	0b0000	NI
 	0b0001	PAuth
 	0b0010	EPAC
@@ -1231,7 +1250,7 @@ Enum	7:4	APA
 	0b0100	FPAC
 	0b0101	FPACCOMBINE
 EndEnum
-Enum	3:0	DPB
+UnsignedEnum	3:0	DPB
 	0b0000	NI
 	0b0001	IMP
 	0b0010	DPB2
@@ -1240,28 +1259,28 @@ EndSysreg
 
 Sysreg	ID_AA64ISAR2_EL1	3	0	0	6	2
 Res0	63:56
-Enum	55:52	CSSC
+UnsignedEnum	55:52	CSSC
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	51:48	RPRFM
+UnsignedEnum	51:48	RPRFM
 	0b0000	NI
 	0b0001	IMP
 EndEnum
 Res0	47:28
-Enum	27:24	PAC_frac
+UnsignedEnum	27:24	PAC_frac
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	23:20	BC
+UnsignedEnum	23:20	BC
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	19:16	MOPS
+UnsignedEnum	19:16	MOPS
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	15:12	APA3
+UnsignedEnum	15:12	APA3
 	0b0000	NI
 	0b0001	PAuth
 	0b0010	EPAC
@@ -1269,32 +1288,32 @@ Enum	15:12	APA3
 	0b0100	FPAC
 	0b0101	FPACCOMBINE
 EndEnum
-Enum	11:8	GPA3
+UnsignedEnum	11:8	GPA3
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	7:4	RPRES
+UnsignedEnum	7:4	RPRES
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	3:0	WFxT
+UnsignedEnum	3:0	WFxT
 	0b0000	NI
 	0b0010	IMP
 EndEnum
 EndSysreg
 
 Sysreg	ID_AA64MMFR0_EL1	3	0	0	7	0
-Enum	63:60	ECV
+UnsignedEnum	63:60	ECV
 	0b0000	NI
 	0b0001	IMP
 	0b0010	CNTPOFF
 EndEnum
-Enum	59:56	FGT
+UnsignedEnum	59:56	FGT
 	0b0000	NI
 	0b0001	IMP
 EndEnum
 Res0	55:48
-Enum	47:44	EXS
+UnsignedEnum	47:44	EXS
 	0b0000	NI
 	0b0001	IMP
 EndEnum
@@ -1329,15 +1348,15 @@ Enum	23:20	TGRAN16
 	0b0001	IMP
 	0b0010	52_BIT
 EndEnum
-Enum	19:16	BIGENDEL0
+UnsignedEnum	19:16	BIGENDEL0
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	15:12	SNSMEM
+UnsignedEnum	15:12	SNSMEM
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	11:8	BIGEND
+UnsignedEnum	11:8	BIGEND
 	0b0000	NI
 	0b0001	IMP
 EndEnum
@@ -1357,62 +1376,62 @@ EndEnum
 EndSysreg
 
 Sysreg	ID_AA64MMFR1_EL1	3	0	0	7	1
-Enum	63:60	ECBHB
+UnsignedEnum	63:60	ECBHB
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	59:56	CMOW
+UnsignedEnum	59:56	CMOW
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	55:52	TIDCP1
+UnsignedEnum	55:52	TIDCP1
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	51:48	nTLBPA
+UnsignedEnum	51:48	nTLBPA
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	47:44	AFP
+UnsignedEnum	47:44	AFP
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	43:40	HCX
+UnsignedEnum	43:40	HCX
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	39:36	ETS
+UnsignedEnum	39:36	ETS
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	35:32	TWED
+UnsignedEnum	35:32	TWED
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	31:28	XNX
+UnsignedEnum	31:28	XNX
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	27:24	SpecSEI
+UnsignedEnum	27:24	SpecSEI
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	23:20	PAN
+UnsignedEnum	23:20	PAN
 	0b0000	NI
 	0b0001	IMP
 	0b0010	PAN2
 	0b0011	PAN3
 EndEnum
-Enum	19:16	LO
+UnsignedEnum	19:16	LO
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	15:12	HPDS
+UnsignedEnum	15:12	HPDS
 	0b0000	NI
 	0b0001	IMP
 	0b0010	HPDS2
 EndEnum
-Enum	11:8	VH
+UnsignedEnum	11:8	VH
 	0b0000	NI
 	0b0001	IMP
 EndEnum
@@ -1420,7 +1439,7 @@ Enum	7:4	VMIDBits
 	0b0000	8
 	0b0010	16
 EndEnum
-Enum	3:0	HAFDBS
+UnsignedEnum	3:0	HAFDBS
 	0b0000	NI
 	0b0001	AF
 	0b0010	DBM
@@ -1428,26 +1447,26 @@ EndEnum
 EndSysreg
 
 Sysreg	ID_AA64MMFR2_EL1	3	0	0	7	2
-Enum	63:60	E0PD
+UnsignedEnum	63:60	E0PD
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	59:56	EVT
+UnsignedEnum	59:56	EVT
 	0b0000	NI
 	0b0001	IMP
 	0b0010	TTLBxS
 EndEnum
-Enum	55:52	BBM
+UnsignedEnum	55:52	BBM
 	0b0000	0
 	0b0001	1
 	0b0010	2
 EndEnum
-Enum	51:48	TTL
+UnsignedEnum	51:48	TTL
 	0b0000	NI
 	0b0001	IMP
 EndEnum
 Res0	47:44
-Enum	43:40	FWB
+UnsignedEnum	43:40	FWB
 	0b0000	NI
 	0b0001	IMP
 EndEnum
@@ -1455,7 +1474,7 @@ Enum	39:36	IDS
 	0b0000	0x0
 	0b0001	0x18
 EndEnum
-Enum	35:32	AT
+UnsignedEnum	35:32	AT
 	0b0000	NI
 	0b0001	IMP
 EndEnum
@@ -1463,7 +1482,7 @@ Enum	31:28	ST
 	0b0000	39
 	0b0001	48_47
 EndEnum
-Enum	27:24	NV
+UnsignedEnum	27:24	NV
 	0b0000	NI
 	0b0001	IMP
 	0b0010	NV2
@@ -1476,19 +1495,19 @@ Enum	19:16	VARange
 	0b0000	48
 	0b0001	52
 EndEnum
-Enum	15:12	IESB
+UnsignedEnum	15:12	IESB
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	11:8	LSM
+UnsignedEnum	11:8	LSM
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	7:4	UAO
+UnsignedEnum	7:4	UAO
 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Enum	3:0	CnP
+UnsignedEnum	3:0	CnP
 	0b0000	NI
 	0b0001	IMP
 EndEnum
@@ -1599,7 +1618,8 @@ EndSysreg
 SysregFields	SMCR_ELx
 Res0	63:32
 Field	31	FA64
-Res0	30:9
+Field	30	EZT0
+Res0	29:9
 Raz	8:4
 Field	3:0	LEN
 EndSysregFields
@@ -1618,6 +1638,130 @@ Sysreg	FAR_EL1	3	0	6	0	0
 Field	63:0	ADDR
 EndSysreg
 
+Sysreg	PMSCR_EL1	3	0	9	9	0
+Res0	63:8
+Field	7:6	PCT
+Field	5	TS
+Field	4	PA
+Field	3	CX
+Res0	2
+Field	1	E1SPE
+Field	0	E0SPE
+EndSysreg
+
+Sysreg	PMSNEVFR_EL1	3	0	9	9	1
+Field	63:0	E
+EndSysreg
+
+Sysreg	PMSICR_EL1	3	0	9	9	2
+Field	63:56	ECOUNT
+Res0	55:32
+Field	31:0	COUNT
+EndSysreg
+
+Sysreg	PMSIRR_EL1	3	0	9	9	3
+Res0	63:32
+Field	31:8	INTERVAL
+Res0	7:1
+Field	0	RND
+EndSysreg
+
+Sysreg	PMSFCR_EL1	3	0	9	9	4
+Res0	63:19
+Field	18	ST
+Field	17	LD
+Field	16	B
+Res0	15:4
+Field	3	FnE
+Field	2	FL
+Field	1	FT
+Field	0	FE
+EndSysreg
+
+Sysreg	PMSEVFR_EL1	3	0	9	9	5
+Field	63:0	E
+EndSysreg
+
+Sysreg	PMSLATFR_EL1	3	0	9	9	6
+Res0	63:16
+Field	15:0	MINLAT
+EndSysreg
+
+Sysreg	PMSIDR_EL1	3	0	9	9	7
+Res0	63:25
+Field	24	PBT
+Field	23:20	FORMAT
+Enum	19:16	COUNTSIZE
+	0b0010	12_BIT_SAT
+	0b0011	16_BIT_SAT
+EndEnum
+Field	15:12	MAXSIZE
+Enum	11:8	INTERVAL
+	0b0000	256
+	0b0010	512
+	0b0011	768
+	0b0100	1024
+	0b0101	1536
+	0b0110	2048
+	0b0111	3072
+	0b1000	4096
+EndEnum
+Res0	7
+Field	6	FnE
+Field	5	ERND
+Field	4	LDS
+Field	3	ARCHINST
+Field	2	FL
+Field	1	FT
+Field	0	FE
+EndSysreg
+
+Sysreg	PMBLIMITR_EL1	3	0	9	10	0
+Field	63:12	LIMIT
+Res0	11:6
+Field	5	PMFZ
+Res0	4:3
+Enum	2:1	FM
+	0b00	FILL
+	0b10	DISCARD
+EndEnum
+Field	0	E
+EndSysreg
+
+Sysreg	PMBPTR_EL1	3	0	9	10	1
+Field	63:0	PTR
+EndSysreg
+
+Sysreg	PMBSR_EL1	3	0	9	10	3
+Res0	63:32
+Enum	31:26	EC
+	0b000000	BUF
+	0b100100	FAULT_S1
+	0b100101	FAULT_S2
+	0b011110	FAULT_GPC
+	0b011111	IMP_DEF
+EndEnum
+Res0	25:20
+Field	19	DL
+Field	18	EA
+Field	17	S
+Field	16	COLL
+Field	15:0	MSS
+EndSysreg
+
+Sysreg	PMBIDR_EL1	3	0	9	10	7
+Res0	63:12
+Enum	11:8	EA
+	0b0000	NotDescribed
+	0b0001	Ignored
+	0b0010	SError
+EndEnum
+Res0	7:6
+Field	5	F
+Field	4	P
+Field	3:0	ALIGN
+EndSysreg
+
 SysregFields	CONTEXTIDR_ELx
 Res0	63:32
 Field	31:0	PROCID
@@ -1772,6 +1916,21 @@ Sysreg	FAR_EL2	3	4	6	0	0
 Field	63:0	ADDR
 EndSysreg
 
+Sysreg	PMSCR_EL2	3	4	9	9	0
+Res0	63:8
+Enum	7:6	PCT
+	0b00	VIRT
+	0b01	PHYS
+	0b11	GUEST
+EndEnum
+Field	5	TS
+Field	4	PA
+Field	3	CX
+Res0	2
+Field	1	E2SPE
+Field	0	E0HSPE
+EndSysreg
+
 Sysreg	CONTEXTIDR_EL2	3	4	13	0	1
 Fields	CONTEXTIDR_ELx
 EndSysreg
@@ -1842,3 +2001,18 @@ Field	23:16	LD
 Res0	15:8
 Field	7:0	LR
 EndSysreg
+
+Sysreg	ISR_EL1	3	0	12	1	0
+Res0	63:11
+Field	10	IS
+Field	9	FS
+Field	8	A
+Field	7	I
+Field	6	F
+Res0	5:0
+EndSysreg
+
+Sysreg	ICC_NMIAR1_EL1	3	0	12	9	5
+Res0	63:24
+Field	23:0	INTID
+EndSysreg