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| author | Will Deacon <will@kernel.org> | 2021-10-29 14:25:33 +0300 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2021-10-29 14:25:33 +0300 |
| commit | e5f521021279dfc52c03c8a1c3f6159c2add1f74 (patch) | |
| tree | f9b9daf87ce9e36702baeaa9649a828f12bcb2f8 /arch/arm64/tools | |
| parent | 655ee5571f4b4987aab4c19e8e77f2c9ac537cdb (diff) | |
| parent | 8d81b2a38ddfc4b03662d2359765648c8b4cc73c (diff) | |
| download | linux-e5f521021279dfc52c03c8a1c3f6159c2add1f74.tar.xz | |
Merge branch 'for-next/trbe-errata' into for-next/core
* for-next/trbe-errata:
arm64: errata: Add detection for TRBE write to out-of-range
arm64: errata: Add workaround for TSB flush failures
arm64: errata: Add detection for TRBE overwrite in FILL mode
arm64: Add Neoverse-N2, Cortex-A710 CPU part definition
Diffstat (limited to 'arch/arm64/tools')
| -rw-r--r-- | arch/arm64/tools/cpucaps | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps index e91795d1a8a3..870c39537dd0 100644 --- a/arch/arm64/tools/cpucaps +++ b/arch/arm64/tools/cpucaps @@ -55,6 +55,9 @@ WORKAROUND_1418040 WORKAROUND_1463225 WORKAROUND_1508412 WORKAROUND_1542419 +WORKAROUND_TRBE_OVERWRITE_FILL_MODE +WORKAROUND_TSB_FLUSH_FAILURE +WORKAROUND_TRBE_WRITE_OUT_OF_RANGE WORKAROUND_CAVIUM_23154 WORKAROUND_CAVIUM_27456 WORKAROUND_CAVIUM_30115 |