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author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2024-01-17 17:04:27 +0300 |
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committer | Sasha Levin <sashal@kernel.org> | 2024-03-27 01:19:27 +0300 |
commit | 24648972fe5db2711ea9bbfac84c9420b7cc5021 (patch) | |
tree | 773e2bc7639a4f526fd1fb34af557aa0501311cb /arch/arm64 | |
parent | a535c7198b3ce7071cabc031b4c421e6931dd696 (diff) | |
download | linux-24648972fe5db2711ea9bbfac84c9420b7cc5021.tar.xz |
arm64: dts: qcom: sm6115: declare VLS CLAMP register for USB3 PHY
[ Upstream commit 95d739ed962c9aaa17d77b739606dbdf31879f6e ]
The USB3 PHY on the SM6115 platform doesn't have built-in
PCS_MISC_CLAMP_ENABLE register. Instead clamping is handled separately
via the register in the TCSR space. Declare corresponding register.
Fixes: 9dd5f6dba729 ("arm64: dts: qcom: sm6115: Add USB SS qmp phy node")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240117-usbc-phy-vls-clamp-v2-6-a950c223f10f@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'arch/arm64')
-rw-r--r-- | arch/arm64/boot/dts/qcom/sm6115.dtsi | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index 839c60351240..87cbc4e8b1ed 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -591,6 +591,11 @@ #hwlock-cells = <1>; }; + tcsr_regs: syscon@3c0000 { + compatible = "qcom,sm6115-tcsr", "syscon"; + reg = <0x0 0x003c0000 0x0 0x40000>; + }; + tlmm: pinctrl@500000 { compatible = "qcom,sm6115-tlmm"; reg = <0x0 0x00500000 0x0 0x400000>, @@ -856,6 +861,8 @@ #phy-cells = <0>; + qcom,tcsr-reg = <&tcsr_regs 0xb244>; + status = "disabled"; }; |