diff options
author | Biju Das <biju.das.jz@bp.renesas.com> | 2022-04-29 10:23:59 +0300 |
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committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-05-06 12:09:32 +0300 |
commit | 1ed914e341392dbb7c29f0f62c105a81cce6b3e0 (patch) | |
tree | ee06c73979917b4ba154cba55c9ebcfcdaad0cbd /arch/arm64 | |
parent | c62af12c700dc435b82df207e49dac3f91ece6c6 (diff) | |
download | linux-1ed914e341392dbb7c29f0f62c105a81cce6b3e0.tar.xz |
arm64: dts: renesas: rzg2ul-smarc: Enable Audio
Enable Audio on RZ/G2UL SMARC EVK by adding ssi1 pincontrol entries
to the soc-pinctrl dtsi and ssi1 and cpu sound_dai nodes to the board
dtsi.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220429072400.23729-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm64')
-rw-r--r-- | arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi | 7 | ||||
-rw-r--r-- | arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi | 23 |
2 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi index 17527184ff2a..201b70150e01 100644 --- a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi @@ -98,4 +98,11 @@ pins = "AUDIO_CLK1", "AUDIO_CLK2"; input-enable; }; + + ssi1_pins: ssi1 { + pinmux = <RZG2L_PORT_PINMUX(3, 0, 2)>, /* BCK */ + <RZG2L_PORT_PINMUX(3, 1, 2)>, /* RCK */ + <RZG2L_PORT_PINMUX(3, 2, 2)>, /* TXD */ + <RZG2L_PORT_PINMUX(3, 3, 2)>; /* RXD */ + }; }; diff --git a/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi index d75ad79ba804..0051634d7b1c 100644 --- a/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi @@ -27,6 +27,10 @@ }; #endif +&cpu_dai { + sound-dai = <&ssi1>; +}; + &i2c1 { wm8978: codec@1a { compatible = "wlf,wm8978"; @@ -35,6 +39,25 @@ }; }; +#if (SW_ET0_EN_N) +&ssi1 { + pinctrl-0 = <&ssi1_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; +#else +&snd_rzg2l { + status = "disabled"; +}; + +&ssi1 { + /delete-property/ pinctrl-0; + /delete-property/ pinctrl-names; + status = "disabled"; +}; +#endif + &vccq_sdhi1 { gpios = <&pinctrl RZG2L_GPIO(6, 1) GPIO_ACTIVE_HIGH>; }; |