summaryrefslogtreecommitdiff
path: root/arch/arm64
diff options
context:
space:
mode:
authorMarc Zyngier <maz@kernel.org>2021-10-26 00:10:16 +0300
committerHector Martin <marcan@marcan.st>2021-10-27 15:12:28 +0300
commit3c866bb79577ed26768680a18fb09903150c6a4f (patch)
treeb7c36dceb79238d6baf847dd5b9d5ea312b4c2bb /arch/arm64
parentff2a8d91d80c548bfec1b0e998ae9b1fdc994119 (diff)
downloadlinux-3c866bb79577ed26768680a18fb09903150c6a4f.tar.xz
arm64: dts: apple: t8103: Add PCIe DARTs
PCIe on the Apple M1 (aka t8103) requires the use of IOMMUs (aka DARTs). Add the three instances that deal with the internal PCIe ports and route each port's traffic through its DART. Signed-off-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Hector Martin <marcan@marcan.st>
Diffstat (limited to 'arch/arm64')
-rw-r--r--arch/arm64/boot/dts/apple/t8103.dtsi30
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/apple/t8103.dtsi b/arch/arm64/boot/dts/apple/t8103.dtsi
index ed562e1103a9..ded82a734d11 100644
--- a/arch/arm64/boot/dts/apple/t8103.dtsi
+++ b/arch/arm64/boot/dts/apple/t8103.dtsi
@@ -219,6 +219,30 @@
<AIC_IRQ 397 IRQ_TYPE_LEVEL_HIGH>;
};
+ pcie0_dart_0: dart@681008000 {
+ compatible = "apple,t8103-dart";
+ reg = <0x6 0x81008000 0x0 0x4000>;
+ #iommu-cells = <1>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 696 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pcie0_dart_1: dart@682008000 {
+ compatible = "apple,t8103-dart";
+ reg = <0x6 0x82008000 0x0 0x4000>;
+ #iommu-cells = <1>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 699 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pcie0_dart_2: dart@683008000 {
+ compatible = "apple,t8103-dart";
+ reg = <0x6 0x83008000 0x0 0x4000>;
+ #iommu-cells = <1>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 702 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
pcie0: pcie@690000000 {
compatible = "apple,t8103-pcie", "apple,pcie";
device_type = "pci";
@@ -239,6 +263,12 @@
msi-parent = <&pcie0>;
msi-ranges = <&aic AIC_IRQ 704 IRQ_TYPE_EDGE_RISING 32>;
+
+ iommu-map = <0x100 &pcie0_dart_0 1 1>,
+ <0x200 &pcie0_dart_1 1 1>,
+ <0x300 &pcie0_dart_2 1 1>;
+ iommu-map-mask = <0xff00>;
+
bus-range = <0 3>;
#address-cells = <3>;
#size-cells = <2>;