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| author | Thomas Gleixner <tglx@linutronix.de> | 2023-10-09 17:01:55 +0300 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2023-10-09 17:01:55 +0300 |
| commit | 4dc5af1fee55e38b5016e45b66bec1e1312973f5 (patch) | |
| tree | db8a686053b878c704c38b993b3d3b556f0a62b5 /arch/arm64 | |
| parent | 9cd847ee4d64c10b52f26f18d19eb6462ba7d2fe (diff) | |
| parent | b673fe1a6229a49be5394f4e539055d9ce685615 (diff) | |
| download | linux-4dc5af1fee55e38b5016e45b66bec1e1312973f5.tar.xz | |
Merge tag 'irqchip-fixes-6.6-2' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent
Pull irqchip fixes from Marc Zyngier:
- DT binding updates for Renesas r8a779f0 and rzg2l
- Let GICv3 honor the "dma-non-coherent" attribute for systems that
rely on SW guessing what the HW supports
- Fix the RISC-V INTC probing by marking all devices as initialised
at once
- Properly translate interrupt numbers from DT on stm32-exti
- Use irq_data_get_irq_chip_data() in the rzg2l driver instead of
blindly dereferencing the irq_data structure
- Add a MAINTAINERS entry for the various ARM GIC irqchip drivers
- Remove myself as the top-level irqchip/irqdomain maintainer
Link: https://lore.kernel.org/all/20231007121933.3840357-1-maz@kernel.org
Diffstat (limited to 'arch/arm64')
0 files changed, 0 insertions, 0 deletions