diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2022-08-02 16:58:45 +0300 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2022-08-02 16:58:46 +0300 |
| commit | 87df0cecc269317def877ed05966781e4389d122 (patch) | |
| tree | c18b9f9e86adf7bba652a1f380b010194b06f48b /arch/arm64 | |
| parent | d2fd1ddd311d94460b285f9dac7e8dbcccd0b8bf (diff) | |
| parent | 5316d73ba81b5dd7fe5ecfcd4ad494a0a68ae138 (diff) | |
| download | linux-87df0cecc269317def877ed05966781e4389d122.tar.xz | |
Merge tag 'asahi-soc-dt-5.20' of https://github.com/AsahiLinux/linux into arm/late
Apple SoC DT updates for 5.20.
This round just adds the NVMe controller nodes, since that driver is
finally upstream. Includes one related power domain fixup.
* tag 'asahi-soc-dt-5.20' of https://github.com/AsahiLinux/linux:
arm64: dts: apple: t8103: Add ANS2 NVMe nodes
arm64: dts: apple: Re-parent ANS2 power domains
Link: https://lore.kernel.org/r/6de8649c-9795-54a1-fa45-8dd50355061f@marcan.st
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm64')
| -rw-r--r-- | arch/arm64/boot/dts/apple/t8103-pmgr.dtsi | 7 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/apple/t8103.dtsi | 34 |
2 files changed, 35 insertions, 6 deletions
diff --git a/arch/arm64/boot/dts/apple/t8103-pmgr.dtsi b/arch/arm64/boot/dts/apple/t8103-pmgr.dtsi index fc51bc872468..a6dbb1f485d8 100644 --- a/arch/arm64/boot/dts/apple/t8103-pmgr.dtsi +++ b/arch/arm64/boot/dts/apple/t8103-pmgr.dtsi @@ -725,11 +725,6 @@ #power-domain-cells = <0>; #reset-cells = <0>; label = "ans2"; - /* - * The ADT makes ps_apcie_st depend on ps_ans2 instead, but this - * doesn't make much sense since ANS2 uses APCIE_ST. - */ - power-domains = <&ps_apcie_st>; }; ps_gfx: power-controller@3f8 { @@ -836,7 +831,7 @@ #power-domain-cells = <0>; #reset-cells = <0>; label = "apcie_st"; - power-domains = <&ps_apcie>; + power-domains = <&ps_apcie>, <&ps_ans2>; }; ps_ane_sys: power-controller@470 { diff --git a/arch/arm64/boot/dts/apple/t8103.dtsi b/arch/arm64/boot/dts/apple/t8103.dtsi index 9f8f4145db88..51a63b29d404 100644 --- a/arch/arm64/boot/dts/apple/t8103.dtsi +++ b/arch/arm64/boot/dts/apple/t8103.dtsi @@ -378,6 +378,40 @@ <AIC_IRQ 274 IRQ_TYPE_LEVEL_HIGH>; }; + ans_mbox: mbox@277408000 { + compatible = "apple,t8103-asc-mailbox", "apple,asc-mailbox-v4"; + reg = <0x2 0x77408000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = <AIC_IRQ 583 IRQ_TYPE_LEVEL_HIGH>, + <AIC_IRQ 584 IRQ_TYPE_LEVEL_HIGH>, + <AIC_IRQ 585 IRQ_TYPE_LEVEL_HIGH>, + <AIC_IRQ 586 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "send-empty", "send-not-empty", + "recv-empty", "recv-not-empty"; + #mbox-cells = <0>; + power-domains = <&ps_ans2>; + }; + + sart: iommu@27bc50000 { + compatible = "apple,t8103-sart"; + reg = <0x2 0x7bc50000 0x0 0x10000>; + power-domains = <&ps_ans2>; + }; + + nvme@27bcc0000 { + compatible = "apple,t8103-nvme-ans2", "apple,nvme-ans2"; + reg = <0x2 0x7bcc0000 0x0 0x40000>, + <0x2 0x77400000 0x0 0x4000>; + reg-names = "nvme", "ans"; + interrupt-parent = <&aic>; + interrupts = <AIC_IRQ 590 IRQ_TYPE_LEVEL_HIGH>; + mboxes = <&ans_mbox>; + apple,sart = <&sart>; + power-domains = <&ps_ans2>, <&ps_apcie_st>; + power-domain-names = "ans", "apcie0"; + resets = <&ps_ans2>; + }; + pcie0_dart_0: dart@681008000 { compatible = "apple,t8103-dart"; reg = <0x6 0x81008000 0x0 0x4000>; |