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authorWill Deacon <will@kernel.org>2023-08-25 14:36:23 +0300
committerWill Deacon <will@kernel.org>2023-08-25 14:36:23 +0300
commitf8f62118cb8e132cd68321b412dd6e316f71b39d (patch)
treecd83a8b3239ee38787b00901769cb4cd06f9f2a4 /arch/arm64
parent7abb3e4ee0d1cbd19defcb366611ae472f34298f (diff)
parent21b61fe48c2fc43d98ebb67a1f3832e0478fa523 (diff)
downloadlinux-f8f62118cb8e132cd68321b412dd6e316f71b39d.tar.xz
Merge branch 'for-next/perf' into for-next/core
* for-next/perf: drivers/perf: hisi: Update HiSilicon PMU maintainers arm_pmu: acpi: Add a representative platform device for TRBE arm_pmu: acpi: Refactor arm_spe_acpi_register_device() hw_breakpoint: fix single-stepping when using bpf_overflow_handler perf/imx_ddr: don't enable counter0 if none of 4 counters are used perf/imx_ddr: speed up overflow frequency of cycle drivers/perf: hisi: Schedule perf session according to locality perf/arm-dmc620: Fix dmc620_pmu_irqs_lock/cpu_hotplug_lock circular lock dependency perf/smmuv3: Add MODULE_ALIAS for module auto loading perf/smmuv3: Enable HiSilicon Erratum 162001900 quirk for HIP08/09 perf: pmuv3: Remove comments from armv8pmu_[enable|disable]_event() perf/arm-cmn: Add CMN-700 r3 support perf/arm-cmn: Refactor HN-F event selector macros perf/arm-cmn: Remove spurious event aliases drivers/perf: Explicitly include correct DT includes perf: pmuv3: Add Cortex A520, A715, A720, X3 and X4 PMUs dt-bindings: arm: pmu: Add Cortex A520, A715, A720, X3, and X4 perf/smmuv3: Remove build dependency on ACPI perf: xgene_pmu: Convert to devm_platform_ioremap_resource() driver/perf: Add identifier sysfs file for Yitian 710 DDR
Diffstat (limited to 'arch/arm64')
-rw-r--r--arch/arm64/include/asm/acpi.h3
-rw-r--r--arch/arm64/kernel/hw_breakpoint.c4
2 files changed, 5 insertions, 2 deletions
diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h
index bd68e1b7f29f..4d537d56eb84 100644
--- a/arch/arm64/include/asm/acpi.h
+++ b/arch/arm64/include/asm/acpi.h
@@ -42,6 +42,9 @@
#define ACPI_MADT_GICC_SPE (offsetof(struct acpi_madt_generic_interrupt, \
spe_interrupt) + sizeof(u16))
+#define ACPI_MADT_GICC_TRBE (offsetof(struct acpi_madt_generic_interrupt, \
+ trbe_interrupt) + sizeof(u16))
+
/* Basic configuration for ACPI */
#ifdef CONFIG_ACPI
pgprot_t __acpi_get_mem_attribute(phys_addr_t addr);
diff --git a/arch/arm64/kernel/hw_breakpoint.c b/arch/arm64/kernel/hw_breakpoint.c
index db2a1861bb97..35225632d70a 100644
--- a/arch/arm64/kernel/hw_breakpoint.c
+++ b/arch/arm64/kernel/hw_breakpoint.c
@@ -654,7 +654,7 @@ static int breakpoint_handler(unsigned long unused, unsigned long esr,
perf_bp_event(bp, regs);
/* Do we need to handle the stepping? */
- if (is_default_overflow_handler(bp))
+ if (uses_default_overflow_handler(bp))
step = 1;
unlock:
rcu_read_unlock();
@@ -733,7 +733,7 @@ static u64 get_distance_from_watchpoint(unsigned long addr, u64 val,
static int watchpoint_report(struct perf_event *wp, unsigned long addr,
struct pt_regs *regs)
{
- int step = is_default_overflow_handler(wp);
+ int step = uses_default_overflow_handler(wp);
struct arch_hw_breakpoint *info = counter_arch_bp(wp);
info->trigger = addr;