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| author | Sasha Levin <sashal@kernel.org> | 2018-11-06 09:23:39 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-11-10 18:48:34 +0300 |
| commit | 0502f1366921284a8f418db753d9fd7af4cd5ba8 (patch) | |
| tree | 9d7d601cb7dd9ddb2fe8f597cd3f26d140eaa063 /arch/arm | |
| parent | eb9b195c53db75c694bf78576925fcb3eed9d0e1 (diff) | |
| download | linux-0502f1366921284a8f418db753d9fd7af4cd5ba8.tar.xz | |
Revert "ARM: tegra: Fix ULPI regression on Tegra20"
This reverts commit b39ac54215190bc178ae7de799e74d327a3c1a33.
The issue was fixed by upstream commit 5d797111afe1 ("clk:
tegra: Add quirk for getting CDEV1/2 clocks on Tegra20").
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/tegra20.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 2780e68a853b..914f59166a99 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -706,7 +706,7 @@ phy_type = "ulpi"; clocks = <&tegra_car TEGRA20_CLK_USB2>, <&tegra_car TEGRA20_CLK_PLL_U>, - <&tegra_car TEGRA20_CLK_PLL_P_OUT4>; + <&tegra_car TEGRA20_CLK_CDEV2>; clock-names = "reg", "pll_u", "ulpi-link"; resets = <&tegra_car 58>, <&tegra_car 22>; reset-names = "usb", "utmi-pads"; |