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author | Linus Torvalds <torvalds@linux-foundation.org> | 2021-02-28 23:06:45 +0300 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2021-02-28 23:06:45 +0300 |
commit | cd278456d4ca0e6b3d5e10ace4566524baa144eb (patch) | |
tree | a5e64b03b5575c6539dd9b39baa8dcf8f10d422f /arch/csky/abiv2/inc/abi/pgtable-bits.h | |
parent | 7d19ea5e99731f5346b047003bbe65117a86d12d (diff) | |
parent | 6607aa6f6b68fc9b5955755f1b1be125cf2a9d03 (diff) | |
download | linux-cd278456d4ca0e6b3d5e10ace4566524baa144eb.tar.xz |
Merge tag 'csky-for-linus-5.12-rc1' of git://github.com/c-sky/csky-linux
Pull arch/csky updates from Guo Ren:
"Features:
- add new memory layout 2.5G(user):1.5G(kernel)
- add kmemleak support
- reconstruct VDSO framework: add VDSO with GENERIC_GETTIMEOFDAY,
GENERIC_TIME_VSYSCALL, HAVE_GENERIC_VDSO
- add faulthandler_disabled() check
- support (fix) swapon
- add (fix) _PAGE_ACCESSED for default pgprot
- abort uaccess retries upon fatal signal (from arm)
Fixes and optimizations:
- fix perf probe failure
- fix show_regs doesn't contain regs->usp
- remove custom asm/atomic.h implementation
- fix barrier design
- fix futex SMP implementation
- fix asm/cmpxchg.h with correct ordering barrier
- cleanup asm/spinlock.h
- fix PTE global for 2.5:1.5 virtual memory
- remove prologue of page fault handler in entry.S
- fix TLB maintenance synchronization problem
- add show_tlb for CPU_CK860 debug
- fix FAULT_FLAG_XXX param for handle_mm_fault
- fix update_mmu_cache called with user io mapping
- fix do_page_fault parent irq status
- fix a size determination in gpr_get()
- pgtable.h: Coding convention
- kprobe: Fix code in simulate without 'long'
- fix pfn_valid error with wrong max_mapnr
- use free_initmem_default() in free_initmem()
- fix compile error"
* tag 'csky-for-linus-5.12-rc1' of git://github.com/c-sky/csky-linux: (30 commits)
csky: Fixup compile error
csky: use free_initmem_default() in free_initmem()
csky: Fixup pfn_valid error with wrong max_mapnr
csky: Add VDSO with GENERIC_GETTIMEOFDAY, GENERIC_TIME_VSYSCALL, HAVE_GENERIC_VDSO
csky: kprobe: Fixup code in simulate without 'long'
csky: Fixup swapon
csky: pgtable.h: Coding convention
csky: Fixup _PAGE_ACCESSED for default pgprot
csky: remove unused including <linux/version.h>
csky: Fix a size determination in gpr_get()
csky: Reconstruct VDSO framework
csky: mm: abort uaccess retries upon fatal signal
csky: Sync riscv mm/fault.c for easy maintenance
csky: Fixup do_page_fault parent irq status
csky: Add faulthandler_disabled() check
csky: Fixup update_mmu_cache called with user io mapping
csky: Fixup FAULT_FLAG_XXX param for handle_mm_fault
csky: Add show_tlb for CPU_CK860 debug
csky: Fix TLB maintenance synchronization problem
csky: Add kmemleak support
...
Diffstat (limited to 'arch/csky/abiv2/inc/abi/pgtable-bits.h')
-rw-r--r-- | arch/csky/abiv2/inc/abi/pgtable-bits.h | 37 |
1 files changed, 24 insertions, 13 deletions
diff --git a/arch/csky/abiv2/inc/abi/pgtable-bits.h b/arch/csky/abiv2/inc/abi/pgtable-bits.h index 137f7932c83b..7e7f389f546f 100644 --- a/arch/csky/abiv2/inc/abi/pgtable-bits.h +++ b/arch/csky/abiv2/inc/abi/pgtable-bits.h @@ -1,37 +1,48 @@ /* SPDX-License-Identifier: GPL-2.0 */ -// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd. #ifndef __ASM_CSKY_PGTABLE_BITS_H #define __ASM_CSKY_PGTABLE_BITS_H /* implemented in software */ #define _PAGE_ACCESSED (1<<7) -#define PAGE_ACCESSED_BIT (7) - #define _PAGE_READ (1<<8) #define _PAGE_WRITE (1<<9) #define _PAGE_PRESENT (1<<10) - #define _PAGE_MODIFIED (1<<11) -#define PAGE_MODIFIED_BIT (11) /* implemented in hardware */ #define _PAGE_GLOBAL (1<<0) - #define _PAGE_VALID (1<<1) -#define PAGE_VALID_BIT (1) - #define _PAGE_DIRTY (1<<2) -#define PAGE_DIRTY_BIT (2) #define _PAGE_SO (1<<5) #define _PAGE_BUF (1<<6) - #define _PAGE_CACHE (1<<3) - #define _CACHE_MASK _PAGE_CACHE -#define _CACHE_CACHED (_PAGE_VALID | _PAGE_CACHE | _PAGE_BUF) -#define _CACHE_UNCACHED (_PAGE_VALID) +#define _CACHE_CACHED (_PAGE_CACHE | _PAGE_BUF) +#define _CACHE_UNCACHED (0) + +#define _PAGE_PROT_NONE _PAGE_WRITE + +/* + * Encode and decode a swap entry + * + * Format of swap PTE: + * bit 0: _PAGE_GLOBAL (zero) + * bit 1: _PAGE_VALID (zero) + * bit 2 - 6: swap type + * bit 7 - 8: swap offset[0 - 1] + * bit 9: _PAGE_WRITE (zero) + * bit 10: _PAGE_PRESENT (zero) + * bit 11 - 31: swap offset[2 - 22] + */ +#define __swp_type(x) (((x).val >> 2) & 0x1f) +#define __swp_offset(x) ((((x).val >> 7) & 0x3) | \ + (((x).val >> 9) & 0x7ffffc)) +#define __swp_entry(type, offset) ((swp_entry_t) { \ + ((type & 0x1f) << 2) | \ + ((offset & 0x3) << 7) | \ + ((offset & 0x7ffffc) << 9)}) #endif /* __ASM_CSKY_PGTABLE_BITS_H */ |