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author | Qi Hu <huqi@loongson.cn> | 2023-09-06 17:53:55 +0300 |
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committer | Huacai Chen <chenhuacai@loongson.cn> | 2023-09-06 17:53:55 +0300 |
commit | bd3c5798484aa9a08302a844d7a75a2ee3b53d05 (patch) | |
tree | 338b637a5062d6a6e97b342691b2969a4ef3bd80 /arch/loongarch/Kconfig | |
parent | f2091321044d9fbcadb93dfc1c9cf23e563ea40c (diff) | |
download | linux-bd3c5798484aa9a08302a844d7a75a2ee3b53d05.tar.xz |
LoongArch: Add Loongson Binary Translation (LBT) extension support
Loongson Binary Translation (LBT) is used to accelerate binary translation,
which contains 4 scratch registers (scr0 to scr3), x86/ARM eflags (eflags)
and x87 fpu stack pointer (ftop).
This patch support kernel to save/restore these registers, handle the LBT
exception and maintain sigcontext.
Signed-off-by: Qi Hu <huqi@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Diffstat (limited to 'arch/loongarch/Kconfig')
-rw-r--r-- | arch/loongarch/Kconfig | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig index 465759f6b0ed..21cc2e2d1f27 100644 --- a/arch/loongarch/Kconfig +++ b/arch/loongarch/Kconfig @@ -254,6 +254,9 @@ config AS_HAS_LSX_EXTENSION config AS_HAS_LASX_EXTENSION def_bool $(as-instr,xvld \$xr0$(comma)\$a0$(comma)0) +config AS_HAS_LBT_EXTENSION + def_bool $(as-instr,movscr2gr \$a0$(comma)\$scr0) + menu "Kernel type and options" source "kernel/Kconfig.hz" @@ -534,6 +537,18 @@ config CPU_HAS_LASX If unsure, say Y. +config CPU_HAS_LBT + bool "Support for the Loongson Binary Translation Extension" + depends on AS_HAS_LBT_EXTENSION + help + Loongson Binary Translation (LBT) introduces 4 scratch registers (SCR0 + to SCR3), x86/ARM eflags (eflags) and x87 fpu stack pointer (ftop). + Enabling this option allows the kernel to allocate and switch registers + specific to LBT. + + If you want to use this feature, such as the Loongson Architecture + Translator (LAT), say Y. + config CPU_HAS_PREFETCH bool default y |