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authorPaul Burton <paul.burton@mips.com>2019-10-02 00:53:05 +0300
committerPaul Burton <paul.burton@mips.com>2019-10-07 19:42:13 +0300
commit878f75c7a2530471844a93b01e887f09d24ed57f (patch)
tree0f9a4e991bb680f9923272d31482d3e636950ef5 /arch/mips/include/asm/llsc.h
parent376357aca715c27f716844e9825417e12e3b02e7 (diff)
downloadlinux-878f75c7a2530471844a93b01e887f09d24ed57f.tar.xz
MIPS: Unify sc beqz definition
We currently duplicate the definition of __scbeqz in asm/atomic.h & asm/cmpxchg.h. Move it to asm/llsc.h & rename it to __SC_BEQZ to fit better with the existing __SC macro provided there. We include a tab in the string in order to avoid the need for users to indent code any further to include whitespace of their own after the instruction mnemonic. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: linux-mips@vger.kernel.org Cc: Huacai Chen <chenhc@lemote.com> Cc: Jiaxun Yang <jiaxun.yang@flygoat.com> Cc: linux-kernel@vger.kernel.org
Diffstat (limited to 'arch/mips/include/asm/llsc.h')
-rw-r--r--arch/mips/include/asm/llsc.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/mips/include/asm/llsc.h b/arch/mips/include/asm/llsc.h
index c6d17d171147..9b19f38562ac 100644
--- a/arch/mips/include/asm/llsc.h
+++ b/arch/mips/include/asm/llsc.h
@@ -25,4 +25,15 @@
#define __EXT "dext "
#endif
+/*
+ * Using a branch-likely instruction to check the result of an sc instruction
+ * works around a bug present in R10000 CPUs prior to revision 3.0 that could
+ * cause ll-sc sequences to execute non-atomically.
+ */
+#if R10000_LLSC_WAR
+# define __SC_BEQZ "beqzl "
+#else
+# define __SC_BEQZ "beqz "
+#endif
+
#endif /* __ASM_LLSC_H */