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authorLinus Torvalds <torvalds@linux-foundation.org>2012-10-15 01:39:05 +0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-10-15 01:39:05 +0400
commita5ef3f7dcba17e79c21afec38188c4c6a0baf995 (patch)
tree1961e2e8c2d30dd7a21b93fa7e70dc62f892651d /arch/mips/include/asm/ptrace.h
parentd25282d1c9b9bc4cda7f9d3c0205108e99aa7a9d (diff)
parent35bafbee4b4732a2820bbd0ef141c8192ff29731 (diff)
downloadlinux-a5ef3f7dcba17e79c21afec38188c4c6a0baf995.tar.xz
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS update from Ralf Baechle: "Cleanups and fixes for breakage that occured earlier during this merge phase. Also a few patches that didn't make the first pull request. Of those is the Alchemy work that merges code for many of the SOCs and evaluation boards thus among other code shrinkage, reduces the number of MIPS defconfigs by 5." * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (22 commits) MIPS: SNI: Switch RM400 serial to SCCNXP driver MIPS: Remove unused empty_bad_pmd_table[] declaration. MIPS: MT: Remove kspd. MIPS: Malta: Fix section mismatch. MIPS: asm-offset.c: Delete unused irq_cpustat_t struct offsets. MIPS: Alchemy: Merge PB1100/1500 support into DB1000 code. MIPS: Alchemy: merge PB1550 support into DB1550 code MIPS: Alchemy: Single kernel for DB1200/1300/1550 MIPS: Optimize TLB refill for RI/XI configurations. MIPS: proc: Cleanup printing of ASEs. MIPS: Hardwire detection of DSP ASE Rev 2 for systems, as required. MIPS: Add detection of DSP ASE Revision 2. MIPS: Optimize pgd_init and pmd_init MIPS: perf: Add perf functionality for BMIPS5000 MIPS: perf: Split the Kconfig option CONFIG_MIPS_MT_SMP MIPS: perf: Remove unnecessary #ifdef MIPS: perf: Add cpu feature bit for PCI (performance counter interrupt) MIPS: perf: Change the "mips_perf_event" table unsupported indicator. MIPS: Align swapper_pg_dir to 64K for better TLB Refill code. vmlinux.lds.h: Allow architectures to add sections to the front of .bss ...
Diffstat (limited to 'arch/mips/include/asm/ptrace.h')
-rw-r--r--arch/mips/include/asm/ptrace.h107
1 files changed, 1 insertions, 106 deletions
diff --git a/arch/mips/include/asm/ptrace.h b/arch/mips/include/asm/ptrace.h
index 4b7f5252d2fd..4f5da948a777 100644
--- a/arch/mips/include/asm/ptrace.h
+++ b/arch/mips/include/asm/ptrace.h
@@ -9,115 +9,12 @@
#ifndef _ASM_PTRACE_H
#define _ASM_PTRACE_H
-/* 0 - 31 are integer registers, 32 - 63 are fp registers. */
-#define FPR_BASE 32
-#define PC 64
-#define CAUSE 65
-#define BADVADDR 66
-#define MMHI 67
-#define MMLO 68
-#define FPC_CSR 69
-#define FPC_EIR 70
-#define DSP_BASE 71 /* 3 more hi / lo register pairs */
-#define DSP_CONTROL 77
-#define ACX 78
-
-/*
- * This struct defines the way the registers are stored on the stack during a
- * system call/exception. As usual the registers k0/k1 aren't being saved.
- */
-struct pt_regs {
-#ifdef CONFIG_32BIT
- /* Pad bytes for argument save space on the stack. */
- unsigned long pad0[6];
-#endif
-
- /* Saved main processor registers. */
- unsigned long regs[32];
-
- /* Saved special registers. */
- unsigned long cp0_status;
- unsigned long hi;
- unsigned long lo;
-#ifdef CONFIG_CPU_HAS_SMARTMIPS
- unsigned long acx;
-#endif
- unsigned long cp0_badvaddr;
- unsigned long cp0_cause;
- unsigned long cp0_epc;
-#ifdef CONFIG_MIPS_MT_SMTC
- unsigned long cp0_tcstatus;
-#endif /* CONFIG_MIPS_MT_SMTC */
-#ifdef CONFIG_CPU_CAVIUM_OCTEON
- unsigned long long mpl[3]; /* MTM{0,1,2} */
- unsigned long long mtp[3]; /* MTP{0,1,2} */
-#endif
-} __attribute__ ((aligned (8)));
-
-/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
-#define PTRACE_GETREGS 12
-#define PTRACE_SETREGS 13
-#define PTRACE_GETFPREGS 14
-#define PTRACE_SETFPREGS 15
-/* #define PTRACE_GETFPXREGS 18 */
-/* #define PTRACE_SETFPXREGS 19 */
-
-#define PTRACE_OLDSETOPTIONS 21
-
-#define PTRACE_GET_THREAD_AREA 25
-#define PTRACE_SET_THREAD_AREA 26
-
-/* Calls to trace a 64bit program from a 32bit program. */
-#define PTRACE_PEEKTEXT_3264 0xc0
-#define PTRACE_PEEKDATA_3264 0xc1
-#define PTRACE_POKETEXT_3264 0xc2
-#define PTRACE_POKEDATA_3264 0xc3
-#define PTRACE_GET_THREAD_AREA_3264 0xc4
-
-/* Read and write watchpoint registers. */
-enum pt_watch_style {
- pt_watch_style_mips32,
- pt_watch_style_mips64
-};
-struct mips32_watch_regs {
- unsigned int watchlo[8];
- /* Lower 16 bits of watchhi. */
- unsigned short watchhi[8];
- /* Valid mask and I R W bits.
- * bit 0 -- 1 if W bit is usable.
- * bit 1 -- 1 if R bit is usable.
- * bit 2 -- 1 if I bit is usable.
- * bits 3 - 11 -- Valid watchhi mask bits.
- */
- unsigned short watch_masks[8];
- /* The number of valid watch register pairs. */
- unsigned int num_valid;
-} __attribute__((aligned(8)));
-
-struct mips64_watch_regs {
- unsigned long long watchlo[8];
- unsigned short watchhi[8];
- unsigned short watch_masks[8];
- unsigned int num_valid;
-} __attribute__((aligned(8)));
-
-struct pt_watch_regs {
- enum pt_watch_style style;
- union {
- struct mips32_watch_regs mips32;
- struct mips64_watch_regs mips64;
- };
-};
-
-#define PTRACE_GET_WATCH_REGS 0xd0
-#define PTRACE_SET_WATCH_REGS 0xd1
-
-#ifdef __KERNEL__
#include <linux/compiler.h>
#include <linux/linkage.h>
#include <linux/types.h>
#include <asm/isadep.h>
+#include <uapi/asm/ptrace.h>
struct task_struct;
@@ -164,6 +61,4 @@ static inline void die_if_kernel(const char *str, struct pt_regs *regs)
die(str, regs);
}
-#endif
-
#endif /* _ASM_PTRACE_H */