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authorPaul Burton <paul.burton@mips.com>2018-09-26 23:56:51 +0300
committerPaul Burton <paul.burton@mips.com>2018-09-26 23:56:51 +0300
commiteb75ecb113f5804a83967b943f29c1024a157087 (patch)
tree06ef353bbc9f75614cdfbba36d75d512b85ac043 /arch/mips/include/asm/r4kcache.h
parent932afdeec18b137b1f9c940bf18ca90338cb3f96 (diff)
downloadlinux-eb75ecb113f5804a83967b943f29c1024a157087.tar.xz
MIPS: MT: Remove unused MT single-threaded cache flush code
Commit ac41f9c46282 ("MIPS: Remove a temporary hack for debugging cache flushes in SMTC configuration") removed an ugly hack that allowed cache flushing to be performed single-threaded, something which should not be necessary outside of debug sessions performed long ago. Whilst the hack was removed from the cache flush code itself, the mt_protdflush & mt_protiflush variables were left behind along with code providing the protdflush & protiflush command line arguments. The mt_cflush_lockdown() & mt_cflush_release() functions were also left behind but are now entirely unused. Remove all the unused code to complete the removal of the MT ASE single-threaded cache flush hack. Signed-off-by: Paul Burton <paul.burton@mips.com>
Diffstat (limited to 'arch/mips/include/asm/r4kcache.h')
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