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author | H. Peter Anvin <hpa@linux.intel.com> | 2014-07-30 21:48:00 +0400 |
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committer | H. Peter Anvin <hpa@linux.intel.com> | 2014-07-30 21:48:00 +0400 |
commit | c3107e3c504d3187ed8eac8179494946faff1481 (patch) | |
tree | e7615968a55fc9176ee02926ae442e9d8890d5bd /arch/mips/include/uapi/asm/sigcontext.h | |
parent | 5ccb8225abf2ac51cd023a99f28366ac9823bd0d (diff) | |
parent | 594c7255dce7a13cac50cf2470cc56e2c3b0494e (diff) | |
download | linux-c3107e3c504d3187ed8eac8179494946faff1481.tar.xz |
Merge tag 'please-pull-apei' into x86/ras
APEI is currently implemented so that it depends on x86 hardware.
The primary dependency is that GHES uses the x86 NMI for hardware
error notification and MCE for memory error handling. These patches
remove that dependency.
Other APEI features such as error reporting via external IRQ, error
serialization, or error injection, do not require changes to use them
on non-x86 architectures.
The following patch set eliminates the APEI Kconfig x86 dependency
by making these changes:
- treat NMI notification as GHES architecture - HAVE_ACPI_APEI_NMI
- group and wrap around #ifdef CONFIG_HAVE_ACPI_APEI_NMI code which
is used only for NMI path
- identify architectural boxes and abstract it accordingly (tlb flush and MCE)
- rework ioremap for both IRQ and NMI context
NMI code is kept in ghes.c file since NMI and IRQ context are tightly coupled.
Note, these patches introduce no functional changes for x86. The NMI notification
feature is hard selected for x86. Architectures that want to use this
feature should also provide NMI code infrastructure.
Diffstat (limited to 'arch/mips/include/uapi/asm/sigcontext.h')
-rw-r--r-- | arch/mips/include/uapi/asm/sigcontext.h | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/mips/include/uapi/asm/sigcontext.h b/arch/mips/include/uapi/asm/sigcontext.h index 681c17603a48..6c9906f59c6e 100644 --- a/arch/mips/include/uapi/asm/sigcontext.h +++ b/arch/mips/include/uapi/asm/sigcontext.h @@ -12,10 +12,6 @@ #include <linux/types.h> #include <asm/sgidefs.h> -/* Bits which may be set in sc_used_math */ -#define USEDMATH_FP (1 << 0) -#define USEDMATH_MSA (1 << 1) - #if _MIPS_SIM == _MIPS_SIM_ABI32 /* @@ -41,8 +37,6 @@ struct sigcontext { unsigned long sc_lo2; unsigned long sc_hi3; unsigned long sc_lo3; - unsigned long long sc_msaregs[32]; /* Most significant 64 bits */ - unsigned long sc_msa_csr; }; #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ @@ -76,8 +70,6 @@ struct sigcontext { __u32 sc_used_math; __u32 sc_dsp; __u32 sc_reserved; - __u64 sc_msaregs[32]; - __u32 sc_msa_csr; }; |