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authorThomas Bogendoerfer <tsbogend@alpha.franken.de>2020-08-24 19:32:45 +0300
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>2020-09-07 23:23:48 +0300
commit44def3426e4ac5a2dbdb5c8304397f4daa38eb2f (patch)
tree365e80bb0639308afa9500270f69b83fdd6f0d3b /arch/mips/mm/c-r4k.c
parent5e5b6527128cea50f12a7064bf61b130b3a2739a (diff)
downloadlinux-44def3426e4ac5a2dbdb5c8304397f4daa38eb2f.tar.xz
MIPS: Convert R4600_V2_HIT_CACHEOP into a config option
Use a new config option to enable R4600 V2 cacheop hit workaround and remove define from different war.h files. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/mm/c-r4k.c')
-rw-r--r--arch/mips/mm/c-r4k.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 814a295a2df2..df09a3653c4f 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -130,7 +130,8 @@ struct bcache_ops *bcops = &no_sc_ops;
#define R4600_HIT_CACHEOP_WAR_IMPL \
do { \
- if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x()) \
+ if (IS_ENABLED(CONFIG_WAR_R4600_V2_HIT_CACHEOP) && \
+ cpu_is_r4600_v2_x()) \
*(volatile unsigned long *)CKSEG1; \
if (IS_ENABLED(CONFIG_WAR_R4600_V1_HIT_CACHEOP)) \
__asm__ __volatile__("nop;nop;nop;nop"); \