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author | Steven J. Hill <Steven.Hill@imgtec.com> | 2013-03-26 00:05:40 +0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2013-05-08 14:30:10 +0400 |
commit | 49bffbdc88fdd8f5eac40306a617252625a0fa35 (patch) | |
tree | cc08116bbf4f742f0f8f2d4381182c13586bc187 /arch/mips/mti-malta/malta-setup.c | |
parent | 270690e00cdb034cd945ab597c24e6aff0227f77 (diff) | |
download | linux-49bffbdc88fdd8f5eac40306a617252625a0fa35.tar.xz |
MIPS: FW: malta: Code formatting clean-ups.
Clean-up code according to the 'checkpatch.pl' script.
Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Diffstat (limited to 'arch/mips/mti-malta/malta-setup.c')
-rw-r--r-- | arch/mips/mti-malta/malta-setup.c | 15 |
1 files changed, 7 insertions, 8 deletions
diff --git a/arch/mips/mti-malta/malta-setup.c b/arch/mips/mti-malta/malta-setup.c index 9e3937602571..c72a06936781 100644 --- a/arch/mips/mti-malta/malta-setup.c +++ b/arch/mips/mti-malta/malta-setup.c @@ -178,13 +178,12 @@ static void __init pci_clock_check(void) char *argptr = fw_getcmdline(); if (pciclock != 33 && !strstr(argptr, "idebus=")) { - printk(KERN_WARNING "WARNING: PCI clock is %dMHz, " - "setting idebus\n", pciclock); + pr_warn("WARNING: PCI clock is %dMHz, setting idebus\n", + pciclock); argptr += strlen(argptr); sprintf(argptr, " idebus=%d", pciclock); if (pciclock < 20 || pciclock > 66) - printk(KERN_WARNING "WARNING: IDE timing " - "calculations will be incorrect\n"); + pr_warn("WARNING: IDE timing calculations will be incorrect\n"); } } #endif @@ -216,14 +215,14 @@ static void __init bonito_quirks_setup(void) argptr = fw_getcmdline(); if (strstr(argptr, "debug")) { BONITO_BONGENCFG |= BONITO_BONGENCFG_DEBUGMODE; - printk(KERN_INFO "Enabled Bonito debug mode\n"); + pr_info("Enabled Bonito debug mode\n"); } else BONITO_BONGENCFG &= ~BONITO_BONGENCFG_DEBUGMODE; #ifdef CONFIG_DMA_COHERENT if (BONITO_PCICACHECTRL & BONITO_PCICACHECTRL_CPUCOH_PRES) { BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_CPUCOH_EN; - printk(KERN_INFO "Enabled Bonito CPU coherency\n"); + pr_info("Enabled Bonito CPU coherency\n"); argptr = fw_getcmdline(); if (strstr(argptr, "iobcuncached")) { @@ -231,13 +230,13 @@ static void __init bonito_quirks_setup(void) BONITO_PCIMEMBASECFG = BONITO_PCIMEMBASECFG & ~(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED | BONITO_PCIMEMBASECFG_MEMBASE1_CACHED); - printk(KERN_INFO "Disabled Bonito IOBC coherency\n"); + pr_info("Disabled Bonito IOBC coherency\n"); } else { BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_IOBCCOH_EN; BONITO_PCIMEMBASECFG |= (BONITO_PCIMEMBASECFG_MEMBASE0_CACHED | BONITO_PCIMEMBASECFG_MEMBASE1_CACHED); - printk(KERN_INFO "Enabled Bonito IOBC coherency\n"); + pr_info("Enabled Bonito IOBC coherency\n"); } } else panic("Hardware DMA cache coherency not supported"); |