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authorJames Hogan <james.hogan@imgtec.com>2015-01-28 00:45:49 +0300
committerRalf Baechle <ralf@linux-mips.org>2015-03-31 13:04:12 +0300
commit7eca5b1460f3f1ad3891252743c36f309df53d53 (patch)
tree7095e8c98c42b1f6ebe1b49409e3285894277a77 /arch/mips/oprofile
parent3ba5040af01fb06a36198f5f6065e25b0655ca0d (diff)
downloadlinux-7eca5b1460f3f1ad3891252743c36f309df53d53.tar.xz
MIPS: Remove redundant IPTI==IPPCI logic
The situation where the timer interrupt is on the same line as the performance counter interrupt is handled in per_cpu_trap_init() by setting cp0_perfcount_irq to -1, so there is no need to duplicate the logic conditional upon cp0_perfcount_irq >= 0 in perf (init_hw_perf_events()) and oprofile (mipsxx_init()). Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9125/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/oprofile')
-rw-r--r--arch/mips/oprofile/op_model_mipsxx.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c
index faf0d4ad0cc2..24729f023d93 100644
--- a/arch/mips/oprofile/op_model_mipsxx.c
+++ b/arch/mips/oprofile/op_model_mipsxx.c
@@ -435,8 +435,7 @@ static int __init mipsxx_init(void)
if (get_c0_perfcount_int)
perfcount_irq = get_c0_perfcount_int();
- else if ((cp0_perfcount_irq >= 0) &&
- (cp0_compare_irq != cp0_perfcount_irq))
+ else if (cp0_perfcount_irq >= 0)
perfcount_irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
else
perfcount_irq = -1;