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authorStafford Horne <shorne@gmail.com>2023-04-14 10:25:58 +0300
committerStafford Horne <shorne@gmail.com>2023-04-26 17:08:06 +0300
commit63d7f9f11e5e81de2ce8f1c7a8aaed5b0288eddf (patch)
treeb547d7264d6e02178c8e755168edb0d17702f760 /arch/openrisc/include/uapi/asm/elf.h
parent812489ac4dd91144a74ce65ecf232252a2e406fb (diff)
downloadlinux-63d7f9f11e5e81de2ce8f1c7a8aaed5b0288eddf.tar.xz
openrisc: Support storing and restoring fpu state
OpenRISC floating point state is not so expensive to save as OpenRISC uses general purpose registers for floating point instructions. We need to save only the floating point status and control register, FPCSR. Add support to maintain the FPCSR unconditionally upon exceptions and switches. On machines that do not support FPU this will always just store 0x0 and restore is a no-op. On FPU systems this adds an additional special purpose register read/write and read/write to memory (already cached). Signed-off-by: Stafford Horne <shorne@gmail.com>
Diffstat (limited to 'arch/openrisc/include/uapi/asm/elf.h')
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