diff options
| author | Helge Deller <deller@gmx.de> | 2021-02-12 18:38:52 +0300 |
|---|---|---|
| committer | Helge Deller <deller@gmx.de> | 2021-02-12 18:39:42 +0300 |
| commit | b7795074a04669d0a023babf786d29bf67c68783 (patch) | |
| tree | 5d4431b00e3416bc66f6fa1fc1a21cc530da4568 /arch/parisc/Kconfig | |
| parent | ae3c4761c15d96999d1aab6c57aedc3beb7fa004 (diff) | |
| download | linux-b7795074a04669d0a023babf786d29bf67c68783.tar.xz | |
parisc: Optimize per-pagetable spinlocks
On parisc a spinlock is stored in the next page behind the pgd which
protects against parallel accesses to the pgd. That's why one additional
page (PGD_ALLOC_ORDER) is allocated for the pgd.
Matthew Wilcox suggested that we instead should use a pointer in the
struct page table for this spinlock and noted, that the comments for the
PGD_ORDER and PMD_ORDER defines were wrong.
Both suggestions are addressed with this patch. Instead of having an own
spinlock to protect the pgd, we now switch to use the existing
page_table_lock. Additionally, beside loading the pgd into cr25 in
switch_mm_irqs_off(), the physical address of this lock is loaded into
cr28 (tr4), so that we can avoid implementing a complicated lookup in
assembly for this lock in the TLB fault handlers.
The existing Hybrid L2/L3 page table scheme (where the pmd is adjacent
to the pgd) has been dropped with this patch.
Remove the locking in set_pte() and the huge-page pte functions too.
They trigger a spinlock recursion on 32bit machines and seem unnecessary.
Suggested-by: Matthew Wilcox <willy@infradead.org>
Fixes: b37d1c1898b2 ("parisc: Use per-pagetable spinlock")
Signed-off-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
Diffstat (limited to 'arch/parisc/Kconfig')
| -rw-r--r-- | arch/parisc/Kconfig | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig index 4cc2a0ffa64a..da7988b87b99 100644 --- a/arch/parisc/Kconfig +++ b/arch/parisc/Kconfig @@ -312,6 +312,16 @@ config IRQSTACKS for handling hard and soft interrupts. This can help avoid overflowing the process kernel stacks. +config TLB_PTLOCK + bool "Use page table locks in TLB fault handler" + depends on SMP + default n + help + Select this option to enable page table locking in the TLB + fault handler. This ensures that page table entries are + updated consistently on SMP machines at the expense of some + loss in performance. + config HOTPLUG_CPU bool default y if SMP |