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authorJohn David Anglin <dave.anglin@bell.net>2022-03-30 17:42:30 +0300
committerHelge Deller <deller@gmx.de>2022-05-23 14:44:24 +0300
commit1fc7db2401d62df5a0b19250ddf3bb89d430dd86 (patch)
tree821739050a04c307d8e6fcba3dda433be2fff7d5 /arch/parisc/include
parent41dc0b53bcb1be3840bd616aea67f5b73400c169 (diff)
downloadlinux-1fc7db2401d62df5a0b19250ddf3bb89d430dd86.tar.xz
parisc: Don't enforce DMA completion order in cache flushes
The only place we need to ensure all outstanding cache coherence operations are complete is in invalidate_kernel_vmap_range. All parisc drivers synchronize DMA operations internally and do not call invalidate_kernel_vmap_range. We only need this for non-coherent I/O operations. Signed-off-by: John David Anglin <dave.anglin@bell.net> Signed-off-by: Helge Deller <deller@gmx.de>
Diffstat (limited to 'arch/parisc/include')
-rw-r--r--arch/parisc/include/asm/cache.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/parisc/include/asm/cache.h b/arch/parisc/include/asm/cache.h
index 5032e758594e..e23d06b51a20 100644
--- a/arch/parisc/include/asm/cache.h
+++ b/arch/parisc/include/asm/cache.h
@@ -54,6 +54,7 @@ void parisc_setup_cache_timing(void);
#define asm_io_sync() asm volatile("sync" \
ALTERNATIVE(ALT_COND_NO_DCACHE, INSN_NOP) \
ALTERNATIVE(ALT_COND_NO_IOC_FDC, INSN_NOP) :::"memory")
+#define asm_syncdma() asm volatile("syncdma" :::"memory")
#endif /* ! __ASSEMBLY__ */