diff options
author | Nicholas Piggin <npiggin@gmail.com> | 2023-03-30 13:32:23 +0300 |
---|---|---|
committer | Michael Ellerman <mpe@ellerman.id.au> | 2023-04-03 07:54:44 +0300 |
commit | 460ba21d83fef766a5d34260e464c9ab8f10aa05 (patch) | |
tree | a71c29e754b6227851569ebd2ba8f2ec297445d0 /arch/powerpc/kvm/powerpc.c | |
parent | 43d05c6123ca1ace5982ca326c156502e735b7d5 (diff) | |
download | linux-460ba21d83fef766a5d34260e464c9ab8f10aa05.tar.xz |
KVM: PPC: Permit SRR1 flags in more injected interrupt types
The prefix architecture in ISA v3.1 introduces a prefixed bit in SRR1
for many types of synchronous interrupts which is set when the interrupt
is caused by a prefixed instruction.
This requires KVM to be able to set this bit when injecting interrupts
into a guest. Plumb through the SRR1 "flags" argument to the core_queue
APIs where it's missing for this. For now they are set to 0, which is
no change.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
[mpe: Fixup kvmppc_core_queue_alignment() in booke.c]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20230330103224.3589928-2-npiggin@gmail.com
Diffstat (limited to 'arch/powerpc/kvm/powerpc.c')
-rw-r--r-- | arch/powerpc/kvm/powerpc.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c index 4c5405fc5538..f9d9e0d1ab23 100644 --- a/arch/powerpc/kvm/powerpc.c +++ b/arch/powerpc/kvm/powerpc.c @@ -321,7 +321,8 @@ int kvmppc_emulate_mmio(struct kvm_vcpu *vcpu) if (vcpu->mmio_is_write) dsisr |= DSISR_ISSTORE; - kvmppc_core_queue_data_storage(vcpu, vcpu->arch.vaddr_accessed, dsisr); + kvmppc_core_queue_data_storage(vcpu, 0, + vcpu->arch.vaddr_accessed, dsisr); } else { /* * BookE does not send a SIGBUS on a bad |