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| author | Christophe Leroy <christophe.leroy@csgroup.eu> | 2020-05-19 08:49:28 +0300 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2020-05-26 15:22:23 +0300 |
| commit | 2b279c0348af62f42be346c1ea6d70bac98df0f9 (patch) | |
| tree | f1c654ed71a103770420b1d024a9743561877607 /arch/powerpc/mm/book3s32 | |
| parent | a2feeb2c2ecbd9c9206d66f238ca710b760c9ef5 (diff) | |
| download | linux-2b279c0348af62f42be346c1ea6d70bac98df0f9.tar.xz | |
powerpc/32s: Allow mapping with BATs with DEBUG_PAGEALLOC
DEBUG_PAGEALLOC only manages RW data.
Text and RO data can still be mapped with BATs.
In order to map with BATs, also enforce data alignment. Set
by default to 256M which is a good compromise for keeping
enough BATs for also KASAN and IMMR.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/fd29c1718ee44d82115d0e835ced808eb4ccbf51.1589866984.git.christophe.leroy@csgroup.eu
Diffstat (limited to 'arch/powerpc/mm/book3s32')
| -rw-r--r-- | arch/powerpc/mm/book3s32/mmu.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/powerpc/mm/book3s32/mmu.c b/arch/powerpc/mm/book3s32/mmu.c index a9b2cbc74797..a6dcc708eee3 100644 --- a/arch/powerpc/mm/book3s32/mmu.c +++ b/arch/powerpc/mm/book3s32/mmu.c @@ -170,6 +170,12 @@ unsigned long __init mmu_mapin_ram(unsigned long base, unsigned long top) pr_debug("RAM mapped without BATs\n"); return base; } + if (debug_pagealloc_enabled()) { + if (base >= border) + return base; + if (top >= border) + top = border; + } if (!strict_kernel_rwx_enabled() || base >= border || top <= border) return __mmu_mapin_ram(base, top); |