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| author | Julia Lawall <Julia.Lawall@inria.fr> | 2022-04-30 21:56:54 +0300 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2022-05-05 15:12:44 +0300 |
| commit | 1fd02f6605b855b4af2883f29a2abc88bdf17857 (patch) | |
| tree | 964bfb2ca78a94aee8dcd37dfdce5b6fbfa3f501 /arch/powerpc/platforms/powernv/idle.c | |
| parent | c14d31bae372e050b053f2511fb3f0f90c27e4f9 (diff) | |
| download | linux-1fd02f6605b855b4af2883f29a2abc88bdf17857.tar.xz | |
powerpc: fix typos in comments
Various spelling mistakes in comments.
Detected with the help of Coccinelle.
Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220430185654.5855-1-Julia.Lawall@inria.fr
Diffstat (limited to 'arch/powerpc/platforms/powernv/idle.c')
| -rw-r--r-- | arch/powerpc/platforms/powernv/idle.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/platforms/powernv/idle.c b/arch/powerpc/platforms/powernv/idle.c index a6677a111aca..6f94b808dd39 100644 --- a/arch/powerpc/platforms/powernv/idle.c +++ b/arch/powerpc/platforms/powernv/idle.c @@ -112,7 +112,7 @@ static int __init pnv_save_sprs_for_deep_states(void) if (rc != 0) return rc; - /* Only p8 needs to set extra HID regiters */ + /* Only p8 needs to set extra HID registers */ if (!cpu_has_feature(CPU_FTR_ARCH_300)) { uint64_t hid1_val = mfspr(SPRN_HID1); uint64_t hid4_val = mfspr(SPRN_HID4); @@ -1204,7 +1204,7 @@ static void __init pnv_arch300_idle_init(void) * The idle code does not deal with TB loss occurring * in a shallower state than SPR loss, so force it to * behave like SPRs are lost if TB is lost. POWER9 would - * never encouter this, but a POWER8 core would if it + * never encounter this, but a POWER8 core would if it * implemented the stop instruction. So this is for forward * compatibility. */ |