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| author | Scott Wood <scottwood@freescale.com> | 2014-09-20 00:20:36 +0400 |
|---|---|---|
| committer | Scott Wood <scottwood@freescale.com> | 2014-09-20 00:20:42 +0400 |
| commit | cb0446c1b625326682ec4f9d1dd10779433646bc (patch) | |
| tree | 9579440c40470de0686518ad274487fb5b41005c /arch/powerpc/sysdev/fsl_msi.h | |
| parent | 6db35ad2373eed5deb3b105ae7c1e9de3e34ae94 (diff) | |
| download | linux-cb0446c1b625326682ec4f9d1dd10779433646bc.tar.xz | |
Revert "powerpc/fsl_msi: spread msi ints across different MSIRs"
This reverts commit c822e73731fce3b49a4887140878d084d8a44c08.
This commit conflicted with a bitmap allocator change that partially
accomplishes the same thing, but which does so more correctly. Revert
this one until it can be respun on top of the correct change.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'arch/powerpc/sysdev/fsl_msi.h')
| -rw-r--r-- | arch/powerpc/sysdev/fsl_msi.h | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/arch/powerpc/sysdev/fsl_msi.h b/arch/powerpc/sysdev/fsl_msi.h index 50ec4b04c732..420cfcbdac01 100644 --- a/arch/powerpc/sysdev/fsl_msi.h +++ b/arch/powerpc/sysdev/fsl_msi.h @@ -15,7 +15,6 @@ #include <linux/of.h> #include <asm/msi_bitmap.h> -#include <asm/atomic.h> #define NR_MSI_REG_MSIIR 8 /* MSIIR can index 8 MSI registers */ #define NR_MSI_REG_MSIIR1 16 /* MSIIR1 can index 16 MSI registers */ @@ -28,8 +27,6 @@ #define FSL_PIC_IP_IPIC 0x00000002 #define FSL_PIC_IP_VMPIC 0x00000003 -#define FSL_PIC_FTR_MPIC_4_3 0x00000010 - struct fsl_msi_cascade_data; struct fsl_msi { @@ -40,8 +37,6 @@ struct fsl_msi { u32 msiir_offset; /* Offset of MSIIR, relative to start of CCSR */ u32 ibs_shift; /* Shift of interrupt bit select */ u32 srs_shift; /* Shift of the shared interrupt register select */ - u32 msir_num; /* Number of available MSIR regs */ - atomic_t msi_alloc_cnt; /* Counter for MSI hwirq allocations */ void __iomem *msi_regs; u32 feature; struct fsl_msi_cascade_data *cascade_array[NR_MSI_REG_MAX]; |