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| author | Leon Romanovsky <leon@kernel.org> | 2023-12-12 10:04:59 +0300 |
|---|---|---|
| committer | Leon Romanovsky <leon@kernel.org> | 2023-12-12 10:04:59 +0300 |
| commit | afcda192dbab7df48dfedb1813a6d03bf6bd4996 (patch) | |
| tree | 270d0e74520e0f8d17da34bbdd8d91dec47f3585 /arch/riscv/boot/dts/microchip/mpfs-m100pfsevp.dts | |
| parent | 07f830ae4913d0b986c8c0ff88a7d597948b9bd8 (diff) | |
| parent | d727d27db536faea7178290c677cc0567f647231 (diff) | |
| download | linux-afcda192dbab7df48dfedb1813a6d03bf6bd4996.tar.xz | |
Expose c0 and SW encap ICM for RDMA
These two series from Mark and Shun extend RDMA mlx5 API.
Mark's series provides c0 register used to match egress
traffic sent by local device.
Shun's series adds new type for ICM area.
Link: https://lore.kernel.org/all/cover.1701871118.git.leon@kernel.org
Signed-off-by: Leon Romanovsky <leon@kernel.org>
Diffstat (limited to 'arch/riscv/boot/dts/microchip/mpfs-m100pfsevp.dts')
| -rw-r--r-- | arch/riscv/boot/dts/microchip/mpfs-m100pfsevp.dts | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/arch/riscv/boot/dts/microchip/mpfs-m100pfsevp.dts b/arch/riscv/boot/dts/microchip/mpfs-m100pfsevp.dts index 184cb36a175e..a8d623ee9fa4 100644 --- a/arch/riscv/boot/dts/microchip/mpfs-m100pfsevp.dts +++ b/arch/riscv/boot/dts/microchip/mpfs-m100pfsevp.dts @@ -10,9 +10,6 @@ #include "mpfs.dtsi" #include "mpfs-m100pfs-fabric.dtsi" -/* Clock frequency (in Hz) of the rtcclk */ -#define MTIMER_FREQ 1000000 - / { model = "Aries Embedded M100PFEVPS"; compatible = "aries,m100pfsevp", "microchip,mpfs"; @@ -33,10 +30,6 @@ stdout-path = "serial1:115200n8"; }; - cpus { - timebase-frequency = <MTIMER_FREQ>; - }; - ddrc_cache_lo: memory@80000000 { device_type = "memory"; reg = <0x0 0x80000000 0x0 0x40000000>; |