diff options
author | Conor Dooley <conor.dooley@microchip.com> | 2023-11-26 14:40:54 +0300 |
---|---|---|
committer | Conor Dooley <conor.dooley@microchip.com> | 2023-11-26 14:44:51 +0300 |
commit | 79997eda0d31bc68203c95ecb978773ee6ce7a1f (patch) | |
tree | 466a91a1f60a9737f231b32711226db90d9706a3 /arch/riscv/boot/dts/microchip/mpfs-sev-kit.dts | |
parent | e80ed63affc9a9b4aacb44180ecd7ed601839599 (diff) | |
download | linux-79997eda0d31bc68203c95ecb978773ee6ce7a1f.tar.xz |
riscv: dts: microchip: move timebase-frequency to mpfs.dtsi
The timebase-frequency on PolarFire SoC is not set by an oscillator on
the board, but rather by an internal divider, so move the property to
mpfs.dtsi.
This looks to be copy-pasta from the SiFive Unleashed as the comments
in both places were almost identical. In the Unleashed's case this looks
to actually be valid, as the clock is provided by a crystal on the PCB.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
CC: Conor Dooley <conor.dooley@microchip.com>
CC: Daire McNamara <daire.mcnamara@microchip.com>
CC: Rob Herring <robh+dt@kernel.org>
CC: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
CC: Paul Walmsley <paul.walmsley@sifive.com>
CC: Palmer Dabbelt <palmer@dabbelt.com>
CC: linux-riscv@lists.infradead.org
CC: devicetree@vger.kernel.org
Diffstat (limited to 'arch/riscv/boot/dts/microchip/mpfs-sev-kit.dts')
-rw-r--r-- | arch/riscv/boot/dts/microchip/mpfs-sev-kit.dts | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/arch/riscv/boot/dts/microchip/mpfs-sev-kit.dts b/arch/riscv/boot/dts/microchip/mpfs-sev-kit.dts index 013cb666c72d..f9a890579438 100644 --- a/arch/riscv/boot/dts/microchip/mpfs-sev-kit.dts +++ b/arch/riscv/boot/dts/microchip/mpfs-sev-kit.dts @@ -6,9 +6,6 @@ #include "mpfs.dtsi" #include "mpfs-sev-kit-fabric.dtsi" -/* Clock frequency (in Hz) of the rtcclk */ -#define MTIMER_FREQ 1000000 - / { #address-cells = <2>; #size-cells = <2>; @@ -28,10 +25,6 @@ stdout-path = "serial1:115200n8"; }; - cpus { - timebase-frequency = <MTIMER_FREQ>; - }; - reserved-memory { #address-cells = <2>; #size-cells = <2>; |