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| author | Jisheng Zhang <jszhang@kernel.org> | 2024-04-29 03:13:15 +0300 |
|---|---|---|
| committer | Conor Dooley <conor.dooley@microchip.com> | 2024-05-01 00:04:17 +0300 |
| commit | 07da6ddf510beb47c059f515cbb92835e146aeb1 (patch) | |
| tree | 5b2720afd65a6e4d2891d2018542f72736be0fc9 /arch/riscv/boot | |
| parent | 0ffce9d49abd9492ea4959ebd3a6e9c12bf3ed70 (diff) | |
| download | linux-07da6ddf510beb47c059f515cbb92835e146aeb1.tar.xz | |
riscv: dts: starfive: visionfive 2: add "disable-wp" for tfcard
No physical write-protect line is present, so setting "disable-wp".
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'arch/riscv/boot')
| -rw-r--r-- | arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index b6030d63459d..e19f26628054 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -304,6 +304,7 @@ no-sdio; no-mmc; cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>; + disable-wp; cap-sd-highspeed; post-power-on-delay-ms = <200>; pinctrl-names = "default"; |