diff options
| author | Jisheng Zhang <jszhang@kernel.org> | 2024-02-17 17:48:26 +0300 |
|---|---|---|
| committer | Inochi Amaoto <inochiama@outlook.com> | 2024-03-27 10:43:33 +0300 |
| commit | 89a7056ed4f771e689729f7992ef5351e64e26c6 (patch) | |
| tree | 88e12b5aa156a88c4f62618c8622d74d7df6a508 /arch/riscv/boot | |
| parent | 4cece764965020c22cff7665b18a012006359095 (diff) | |
| download | linux-89a7056ed4f771e689729f7992ef5351e64e26c6.tar.xz | |
riscv: dts: sophgo: add sdcard support for milkv duo
Add sdhci dt node in SoC dtsi and enable it in milkv duo dts.
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Reviewed-by: Inochi Amaoto <inochiama@outlook.com>
Link: https://lore.kernel.org/r/20240217144826.3944-1-jszhang@kernel.org
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Diffstat (limited to 'arch/riscv/boot')
| -rw-r--r-- | arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts | 8 | ||||
| -rw-r--r-- | arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 17 |
2 files changed, 25 insertions, 0 deletions
diff --git a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts index 3af9e34b3bc7..94e64ddce8fa 100644 --- a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts +++ b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts @@ -33,6 +33,14 @@ clock-frequency = <25000000>; }; +&sdhci0 { + status = "okay"; + bus-width = <4>; + no-1-8-v; + no-mmc; + no-sdio; +}; + &uart0 { status = "okay"; }; diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi index 2d6f4a4b1e58..405f4ba18392 100644 --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi @@ -4,6 +4,7 @@ * Copyright (C) 2023 Inochi Amaoto <inochiama@outlook.com> */ +#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/irq.h> / { @@ -45,6 +46,13 @@ #clock-cells = <0>; }; + sdhci_clk: sdhci-clock { + compatible = "fixed-clock"; + clock-frequency = <375000000>; + clock-output-names = "sdhci_clk"; + #clock-cells = <0>; + }; + soc { compatible = "simple-bus"; interrupt-parent = <&plic>; @@ -175,6 +183,15 @@ status = "disabled"; }; + sdhci0: mmc@4310000 { + compatible = "sophgo,cv1800b-dwcmshc"; + reg = <0x4310000 0x1000>; + interrupts = <36 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&sdhci_clk>; + clock-names = "core"; + status = "disabled"; + }; + plic: interrupt-controller@70000000 { reg = <0x70000000 0x4000000>; interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>; |