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authorAnup Patel <apatel@ventanamicro.com>2022-11-14 12:05:34 +0300
committerPalmer Dabbelt <palmer@rivosinc.com>2022-12-09 02:43:58 +0300
commitb91676fc16cd384a81e3af52c641aa61985cc231 (patch)
tree9e4b73c47f49f3cc7d80020d31fcc354c1a51a95 /arch/riscv/configs/defconfig
parent9abf2313adc1ca1b6180c508c25f22f9395cc780 (diff)
downloadlinux-b91676fc16cd384a81e3af52c641aa61985cc231.tar.xz
RISC-V: Fix MEMREMAP_WB for systems with Svpbmt
Currently, the memremap() called with MEMREMAP_WB maps memory using the generic ioremap() function which breaks on system with Svpbmt because memory mapped using _PAGE_IOREMAP page attributes is treated as strongly-ordered non-cacheable IO memory. To address this, we implement RISC-V specific arch_memremap_wb() which maps memory using _PAGE_KERNEL page attributes resulting in write-back cacheable mapping on systems with Svpbmt. Fixes: ff689fd21cb1 ("riscv: add RISC-V Svpbmt extension support") Co-developed-by: Mayuresh Chitale <mchitale@ventanamicro.com> Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20221114090536.1662624-2-apatel@ventanamicro.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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