diff options
author | Palmer Dabbelt <palmer@dabbelt.com> | 2018-08-04 11:23:19 +0300 |
---|---|---|
committer | Palmer Dabbelt <palmer@sifive.com> | 2018-08-13 18:31:31 +0300 |
commit | 62b0194368147def8c5a77ce604a125d620fc582 (patch) | |
tree | ffb0a3da4944a8aa15ce481a5e695acc03da3684 /arch/riscv/include/asm | |
parent | 6ea0f26a7913b2a72f9cbe84e77ad2cbeaaa9dde (diff) | |
download | linux-62b0194368147def8c5a77ce604a125d620fc582.tar.xz |
clocksource: new RISC-V SBI timer driver
The RISC-V ISA defines a per-hart real-time clock and timer, which is
present on all systems. The clock is accessed via the 'rdtime'
pseudo-instruction (which reads a CSR), and the timer is set via an SBI
call.
Contains various improvements from Atish Patra <atish.patra@wdc.com>.
Signed-off-by: Dmitriy Cherkasov <dmitriy@oss-tech.org>
Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
[hch: remove dead code, add SPDX tags, used riscv_of_processor_hart(),
minor cleanups, merged hotplug cpu support and other improvements
from Atish]
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'arch/riscv/include/asm')
-rw-r--r-- | arch/riscv/include/asm/smp.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/arch/riscv/include/asm/smp.h b/arch/riscv/include/asm/smp.h index c9395fff246f..36016845461d 100644 --- a/arch/riscv/include/asm/smp.h +++ b/arch/riscv/include/asm/smp.h @@ -25,9 +25,6 @@ #ifdef CONFIG_SMP /* SMP initialization hook for setup_arch */ -void __init init_clockevent(void); - -/* SMP initialization hook for setup_arch */ void __init setup_smp(void); /* Hook for the generic smp_call_function_many() routine. */ |