summaryrefslogtreecommitdiff
path: root/arch/riscv/include/uapi
diff options
context:
space:
mode:
authorClément Léger <cleger@rivosinc.com>2023-11-14 17:12:49 +0300
committerPalmer Dabbelt <palmer@rivosinc.com>2023-12-13 02:45:10 +0300
commit74ba42b250a7339c72e5803490b1ea42c3556f26 (patch)
tree74c722b0d5960140c3bdbac3693f4c295d504592 /arch/riscv/include/uapi
parenteddbfa0d849fa5a315840e8c501962252b48484d (diff)
downloadlinux-74ba42b250a7339c72e5803490b1ea42c3556f26.tar.xz
riscv: hwprobe: export Zhintntl ISA extension
Export Zihintntl extension[1] through hwprobe. Link: https://drive.google.com/file/d/13_wsN8YmRfH8YWysFyTX-DjTkCnBd9hj/view [1] Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Evan Green <evan@rivosinc.com> Link: https://lore.kernel.org/r/20231114141256.126749-14-cleger@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch/riscv/include/uapi')
-rw-r--r--arch/riscv/include/uapi/asm/hwprobe.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h
index 2d960777ea43..d72c69ea0740 100644
--- a/arch/riscv/include/uapi/asm/hwprobe.h
+++ b/arch/riscv/include/uapi/asm/hwprobe.h
@@ -52,6 +52,7 @@ struct riscv_hwprobe {
#define RISCV_HWPROBE_EXT_ZVKT (1 << 26)
#define RISCV_HWPROBE_EXT_ZFH (1 << 27)
#define RISCV_HWPROBE_EXT_ZFHMIN (1 << 28)
+#define RISCV_HWPROBE_EXT_ZIHINTNTL (1 << 29)
#define RISCV_HWPROBE_KEY_CPUPERF_0 5
#define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0)
#define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0)