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author | Anup Patel <apatel@ventanamicro.com> | 2023-09-18 09:18:29 +0300 |
---|---|---|
committer | Anup Patel <anup@brainfault.org> | 2023-09-21 12:33:59 +0300 |
commit | ef4d48368587f27cb1f690691518889d8fb3510b (patch) | |
tree | 6feadc6954c46c3f1f7fe4c55b8a3e5c896cba1b /arch/riscv | |
parent | ce9ecca0238b140b88f43859b211c9fdfd8e5b70 (diff) | |
download | linux-ef4d48368587f27cb1f690691518889d8fb3510b.tar.xz |
RISC-V: KVM: Fix KVM_GET_REG_LIST API for ISA_EXT registers
The ISA_EXT registers to enabled/disable ISA extensions for VCPU
are always available when underlying host has the corresponding
ISA extension. The copy_isa_ext_reg_indices() called by the
KVM_GET_REG_LIST API does not align with this expectation so
let's fix it.
Fixes: 031f9efafc08 ("KVM: riscv: Add KVM_GET_REG_LIST API support")
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'arch/riscv')
-rw-r--r-- | arch/riscv/kvm/vcpu_onereg.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c index 1b7e9fa265cb..e7e833ced91b 100644 --- a/arch/riscv/kvm/vcpu_onereg.c +++ b/arch/riscv/kvm/vcpu_onereg.c @@ -842,7 +842,7 @@ static int copy_isa_ext_reg_indices(const struct kvm_vcpu *vcpu, u64 reg = KVM_REG_RISCV | size | KVM_REG_RISCV_ISA_EXT | i; isa_ext = kvm_isa_ext_arr[i]; - if (!__riscv_isa_extension_available(vcpu->arch.isa, isa_ext)) + if (!__riscv_isa_extension_available(NULL, isa_ext)) continue; if (uindices) { |