diff options
| author | Palmer Dabbelt <palmer@rivosinc.com> | 2024-05-24 21:56:00 +0300 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2024-05-30 19:42:53 +0300 |
| commit | 982a7eb97be685d1129c06671aed4c26d6919af4 (patch) | |
| tree | 84600d6540ddfe5443e630b59d67cb1edb37cfe6 /arch/riscv | |
| parent | 7bed51617401dab2be930b13ed5aacf581f7c8ef (diff) | |
| download | linux-982a7eb97be685d1129c06671aed4c26d6919af4.tar.xz | |
Documentation: RISC-V: uabi: Only scalar misaligned loads are supported
We're stuck supporting scalar misaligned loads in userspace because they
were part of the ISA at the time we froze the uABI. That wasn't the
case for vector misaligned accesses, so depending on them
unconditionally is a userspace bug. All extant vector hardware traps on
these misaligned accesses.
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240524185600.5919-1-palmer@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch/riscv')
0 files changed, 0 insertions, 0 deletions