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authorAl Viro <viro@zeniv.linux.org.uk>2008-08-18 05:05:42 +0400
committerH. Peter Anvin <hpa@zytor.com>2008-10-23 09:55:20 +0400
commitbb8985586b7a906e116db835c64773b7a7d51663 (patch)
treede93ae58e88cc563d95cc124a73f3930594c6100 /arch/x86/include/asm/agp.h
parent8ede0bdb63305d3353efd97e9af6210afb05734e (diff)
downloadlinux-bb8985586b7a906e116db835c64773b7a7d51663.tar.xz
x86, um: ... and asm-x86 move
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch/x86/include/asm/agp.h')
-rw-r--r--arch/x86/include/asm/agp.h35
1 files changed, 35 insertions, 0 deletions
diff --git a/arch/x86/include/asm/agp.h b/arch/x86/include/asm/agp.h
new file mode 100644
index 000000000000..3617fd4fcdf9
--- /dev/null
+++ b/arch/x86/include/asm/agp.h
@@ -0,0 +1,35 @@
+#ifndef ASM_X86__AGP_H
+#define ASM_X86__AGP_H
+
+#include <asm/pgtable.h>
+#include <asm/cacheflush.h>
+
+/*
+ * Functions to keep the agpgart mappings coherent with the MMU. The
+ * GART gives the CPU a physical alias of pages in memory. The alias
+ * region is mapped uncacheable. Make sure there are no conflicting
+ * mappings with different cachability attributes for the same
+ * page. This avoids data corruption on some CPUs.
+ */
+
+#define map_page_into_agp(page) set_pages_uc(page, 1)
+#define unmap_page_from_agp(page) set_pages_wb(page, 1)
+
+/*
+ * Could use CLFLUSH here if the cpu supports it. But then it would
+ * need to be called for each cacheline of the whole page so it may
+ * not be worth it. Would need a page for it.
+ */
+#define flush_agp_cache() wbinvd()
+
+/* Convert a physical address to an address suitable for the GART. */
+#define phys_to_gart(x) (x)
+#define gart_to_phys(x) (x)
+
+/* GATT allocation. Returns/accepts GATT kernel virtual address. */
+#define alloc_gatt_pages(order) \
+ ((char *)__get_free_pages(GFP_KERNEL, (order)))
+#define free_gatt_pages(table, order) \
+ free_pages((unsigned long)(table), (order))
+
+#endif /* ASM_X86__AGP_H */